Assembly language

1
Assembly language

• This is a brief introduction to assembly
  language. Assembly language is the most basic
  programming language available for any processor.
  With assembly language, a programmer works only
  with operations implemented directly on the
  physical CPU.
• Assembly language lacks high-level conveniences
  such as variables and functions, and it is not
  portable between various families of processors.
• Nevertheless, assembly language is the most
  powerful computer programming language available,
  and it gives programmers the insight required to
  write effective code in high-level languages.
  Learning assembly language is well worth the time
  and effort of every serious programmer.

2
The Basics

• Before we can explore the process of writing
  computer programs, we have to go back to the
  basics and learn exactly what a computer is and
  how it works. Every computer, no matter how
  simple or complex, has at its heart exactly two
  things a CPU and some memory. Together, these
  two things are what make it possible for your
  computer to run programs
• On the most basic level, a computer program is
  nothing more than a collection of numbers stored
  in memory. Different numbers tell the CPU to do
  different things. The CPU reads the numbers one
  at a time, decodes them, and does what the
  numbers say.
• For example, if the CPU reads the number 64 as
  part of a program, it will add 1 to the number
  stored in a special location called AX. If the
  CPU reads the number 146, it will swap the number
  stored in AX with the number stored in another
  location called BX.

3

• By combining many simple operations such these
  into a program, a programmer can make the
  computer perform many incredible things.
• As an example, here are the numbers of a simple
  computer program 184, 0, 184, 142, 216, 198, 6,
  158, 15, 36, 205, 32. If you were to enter these
  numbers into your computer's memory and run them
  under MS-DOS, you would see a dollar sign placed
  in the lower right hand corner of your screen,
  since that is what these numbers tell the
  computer to do.

4
Instruction sets

• A computer executes instructions, which have
  been preloaded into its memory. Each instruction
  comprises of one or two fields, one of which is
  known as the operation code, or opcode, which,
  defines the operation to be carried out and
  another field, which defines the values upon
  which the operation code executes.
• The operation field is further subdivided into
  source fields, which define where the values to
  be operated on are located, and a destination
  field, which specifies where the result of the
  operation is to be stored. This structure for an
  instruction is shown below.

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• The set of different operation codes provided by
  a particular processor is known as its
  instruction set and the ways in which the
  operands can be specified are known as addressing
  modes.
• The opcode and operands of an instruction have to
  be encoded into bit patterns, which reside in
  memory. Whilst in theory any number of bit can be
  used for storing the instruction, in practice
  instructions are represented in whole number of
  words since transfers between memory and
  processor use the word as their unit of transfer.
• Some instruction need more operands than others,
  for example the instruction to halt execution
  needs no operands whilst the instruction to add
  two values together needs at least two operands.
  Thus there is often more than one format for
  instructions, and opcodes and operands can occupy
  a different number of bits in different formats.

6

• Instructions are stored in the memory of a
  computer as bit patterns. Before a program is
  executed the bit patterns, the machine code
  corresponding to the instructions in the program
  and the constant data accessed by the
  instructions have to be loaded into the memory of
  a computer.
• However, specifying the program in terms of the
  appropriate bit patterns is not very convenient
  for the programmer. Instead, the programmer can
  use a notation called assembly code which is a
  simple mnemonic encoding of the bit pattern.
  Examples are shown below
• ADD B add the contents of register B to
  the accumulator
• ADD D0, D1 add the contents of the
  register D0 to the contents of the
  register D1 and store the result in D1
• L MOVE D0, D4 L is a label so the
  statement can be referred to from elsewhere in
  the code. The instruction moves the contents of
  register D0 to register D4 overwriting any
  information stored there.

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Opcode

• The set of instructions provided by the designer
  is known as the instruction set of that computer.
  It is defined by the designer and determined by
  the lower level abstractions, the implementation,
  of the processor. It defines the combinations of
  operations of the ALU and operands which can be
  activated by the control unit in a single
  instruction cycle. Restrictions on the number of
  different operations and the combinations of
  operations and operands are imposed by the
  designer for a number of reasons.
• 1 First the designer is often working against a
  limit on the size of the integrated circuit used
  to implement the processor and so it is not
  possible to include all the combinations of
  operations and operands.
• 2 A second reason for restricting the number of
  operations and combinations with operands is that
  the processor is aimed at a particular
  application or set of applications and these do
  not need the complete set of possible
  instructions.

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• One of the first tasks of the computer designer
  is to decide how to encode the operation code in
  each instruction. The simplest method is to
  encode the opcode in the minimum number of bits,
  so that n bits can represent 2n different
  operations.
• Not all operation require the same number of
  operands and hence the number of bits required to
  store a field of an instruction can vary. Thus it
  may not be necessary for all opcodes to be fully
  encoded, that is to use a minimum number of bits.
  This makes it easier to design and implement the
  decoding hardware within the processor.
• A processor provides operations on a range of
  different data types. The range of data types.
  The range of types supported will depend on the
  complexity of the processor but even the simplest
  processors will normally support operations on
  characters (8-bit quantities) and integers(16
  bits or more) as part of the standard instruction
  set. Processors intended for numerical
  computation will also include operations on
  floating point numbers.

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• The 68000 processor is the one, which we are
  going to concentrate on which supports operations
  on 8-, 16- and 32- bit quantities.
• This processor does not support floating-point
  operations directly. Sometimes different
  instructions are required to perform a function,
  for example the internal operations to be
  performed to add two integers are different from
  those required add two floating point numbers
  together, hence there is a need for two different
  types of add instruction.
• A simple way of distinguishing, in the coded form
  of the operation, between the different forms of
  a instruction is to use one or more bits to
  signify the data type involved. This is reflected
  in assembly code by the use of a qualifier to the
  instruction, for example, the 68000 has many
  different forms of MOVE instruction and some of
  which operates on bytes( 8 bit) some on words (16
  bits) and some on long words(32 bits). These
  instructions are differentiated by the use of .B
  after the opcode for the byte instructions, .W
  after the opcode for words instructions and .L
  for long word instructions.

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The 68000 processor

• In the 68000 there are 16 general purpose
  registers, each 32 bits wide, called A0-A7 and
  D0- D7.

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• D0-D7
• The set D0-D7 are called data registers and are
  generally used for storing intermediate results
  of calculations. They are completely general in
  that any operation on one of the set could
  equally well take place on any other one there
  are no restrictions.
• Each register may be operated on by three groups
  of instructions, denoted by .L, .W and .B
  respectively, in assembly code. The long word
  instructions manipulate the complete 32 bits of
  the register, the word the bottom 16 bits and the
  byte the bottom 8 bits, with the bits not being
  manipulated being unaffected
• A0-A7
• The set A0-A7 are called the address registers
  because they normally act as pointers to
  locations in memory. They may also be used to
  hold data, but word and long-word operations
  affect all the bits and byte operations are not
  allowed. A7 is used as a pointer to a stack on
  which subroutine return addresses are held. The
  condition codes are stored here, it also stores a
  status byte .

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Memory addressing on the 68000

• The addressing structure of memory is important
  to the programmer and it can differ from
  processor to processor. On the 68000, memory is
  byte addressable and words have even addresses.
  The high order bits of the word, bits 8-15, take
  the word address and the low-order bits the word
  address 1. Longwords are mapped in a similar
  way, that the 16 high order bits are stored in
  the lower address word and the 16 low-order bits
  in the higher address word. These addressing
  conventions are shown below.

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Instruction types

• Each type of processor provides its own unique
  set of instructions but the type of instruction
  provided by processors can be classified into a
  number of classes
• Data movement instructions
• Probably the most extensive class of
  instructions provided on all present-day
  computers are the data movement instructions.
  These instructions allow the programmer to move
  data between registers, between registers and
  memory and to move data about in main memory.
• The 68000 has a large number of move
  instructions such as MOVE and its derivatives
  MOVEQ, to accomplish transfers between any pair
  of registers, between any register and a memory
  address and to load a constant embedded in the
  instruction to a register or memory address.

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• Many of the move instructions operate on the
  three sizes of data which the 68000 can
  manipulate, bytes( 8-bits), words(16 bits) and
  long words (32 bits). The 68000 is also able to
  move data between memory locations directly
  rather than having to go via the accumulator
  which is the case with other processors, since
  the 68000 has multiple address registers and
  other processor have only one. There are a large
  number of MOVE derivatives on the 68000 concerned
  with moving contents of special registers.
• Examples
• MOVE.B D0, D1 move the bottom 8 bits
  of D0 to the same position in D1
• MOVE.L D0,D1 move the 32 bits in D0
  to the same position in D1
• MOVEQ 3, D0 move (quick) the constant
  3 to the 32 bits of D0 note that for this
  instruction the constant must be lt 8 bits.

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Arithmetic and logical operations

• Another class of instructions is the arithmetic
  and logical operations. The main arithmetic and
  logical operations available on the 68000 are the
  ones in the shown below.
• ADD Add variants
• SUB Subtract variants
• NEG Negate variants
• AND Logical AND
• EOR Exclusive OR
• OR Inclusive OR
• ROL Rotate left
• ROR Rotate Right
• ASL Shift left
• ASR Shift right
• DIVS Divide variants
• MULS Multiply variants

Examples ADD.W D0, D1 add the bottom
16 bits of D0 to the bottom 16 bits of D1 and
store the result in the bottom 16 bits of
D1 ADD.L D0, D1 do the same as
above but with 32-bit operands.
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Bit manipulation operations

• The 68000 provides four instructions which
  operate on single bits in an operand. There are
  operations to test the value of a single bit, to
  set the value of a single bit to 1, to set the
  value of a single bit to 0 and to change the
  value from 1 to 0 and vice versa. These
  operations are shown below
• BTST test bit, if bit 0 set Z condition code
• BSET set the addressed bit to 1
• BCET set the addressed bit to 0
• BCHG invert the addresses bit i.e. 1 to 0 or 0
  to 1
• Examples
• BSET D1,D5 the value in D1 is taken as an
  integer mod 32 and this bit of D5 is set to 1
• BTST D3,D6 the D3th bit of D6 is tested
  and if zero the z condition is set to 1
• 4. Program control instructions
• An important property of any processor is the
  ability to change the program executing sequence
  depending on the input data, either directly or
  indirectly. Without this facility a set of
  instructions could only be executed once. To
  change the executions sequence requires two types
  of instructions ones which can test the value of
  some item and ones which

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Program control instructions

• An important property of any processor is the
  ability to change the program executing sequence
  depending on the input data, either directly or
  indirectly. Without this facility a set of
  instructions could only be executed once.
• To change the executions sequence requires two
  types of instructions ones which can test the
  value of some item and ones which can jump to an
  instruction out of sequence depending on the
  result of a previous data test. There is also a
  requirement for an unconditional transfer of
  control to implement loops in the code.
• Most processors store information about the
  result of the last instruction executed in a set
  of flag bits sometimes called condition codes,
  which are usually grouped together in a status
  register. The test instructions set or clear the
  appropriate condition codes and the conditional
  jump instructions test the values in one or more
  of these codes to decide whether or not to
  perform the jump.

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• Whilst most processors update the condition codes
  as the result of the execution of most
  instructions in the instruction set, it is often
  necessary to perform specific tests or
  comparisons before a conditional jump.
• 1. Condition tests
• The 68000 provide compare instructions which set
  the condition code registers depending on the
  result of the comparison as shown below. The
  compare instruction takes two operands and sets
  the value of the condition codes.
• Example
• CMP.L D0,D4 subtract the 32-bit value stored
  in D0 from that in D4 and set the condition
  codes on the result. Neither the contents of D0
  or D4 are changed

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• CMPI.B 7, D5 subtract 7 from the least
  significant 8 bits of D5 and set the condition
  codes on the result. D5 is not altered.
• TST.W D1 set the condition codes
  depending on the value stored in the Least-
  significant 16 bits in D1
• CMP variants compare two values stored in
  memory or registers set the condition codes
  on result
• TST set the condition codes
  depending on the value in the single address
  specified

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2. Branch Instructions

• The 68000 has an extensive set of conditional
  jump instructions as shown below. Each of these
  instructions uses the value of one or more of the
  condition codes of flags to determine whether the
  next instruction to be obeyed is the next one in
  sequence or the one at the address specified as
  the operand of the conditional jump. An
  unconditional branch instruction is also included
  in the 68000, which causes control to be
  transferred to the specified address
  unconditionally.
• BEQ LAB jump to the statement labelled LAB if
  the result of the last instruction was equal to
  zero, that is the zero condition was set,
  otherwise take no action.
• BPL THERE jump to statement labelled THERE, if
  the result of the last instruction was positive,
  otherwise take no action

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• Some more of the branch instructions are shown in
  the table below
• Jump Condition Condition
• code tested 68000
• BCC c Carry clear
• BCS c Carry set
• BEQ z Last ins0
• BNE z Last ins not equal to 0
• BPL n Last ins ve
• BMI n Last ins -ve
• BGT z,n,v Last ins gt
• BLT n,v Last ins lt
• JMP p Always jump
• BRA p Always jump

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Subroutine call and return

• Another class of transfer of control instructions
  is the subroutine entry and exit instructions,
  often called call and return instructions.
• There are frequent cases in programming where the
  same sequence of instructions is required in more
  than one place in a program. Instead of writing
  the code in both places, it may be written once
  as a subroutine or procedure and special
  instructions inserted in the code at the
  appropriate place to cause transfer of control to
  the instruction following the call. This concept
  is illustrated below.
• In order for this action to be possible the
  return address has to be stored when the routine
  is called and this address restored to the
  program counter by the return instruction at the
  end of the routine. Frequently subroutines call
  other subroutines to perform part of the
  calculation, and the return address mechanism
  must be able to work over a set of subroutine
  calls nested hierarchically.

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• The most common way of providing this facility is
  to store the return address in a data structure
  called a stack where the last value inserted is
  the first value retrieved. Using this data a set
  of routines can call one another and the return
  instructions will cause control to be retune in
  the correct order, that is in the opposite order
  to the calling sequence.

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• The instruction to branch to a subroutine on the
  68000 is JSR and RTS . the call and return
  instructions for the 68000 are shown below
• JSR call
• BSR call
• RTS return
• RTR Return and restore condition codes
• Examples
• JSR SUB jump to the statement labelled
  SUB having stored the return address on the stack
• RTS return from subroutine, that is
  restore the program count value from the stack.
  

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Input-output instructions

• Every computer needs some mechanism to input data
  and output the result of computations. Input and
  output peripherals are treated like registers by
  the programmer and these registers are normally
  accessed by the following mechanism. This method
  is called memory mapped input-output it maps the
  input-output registers into the normal memory
  address space of the processor and so the
  standard data movement instructions of the
  computer may be used for input output, no special
  instructions are necessary. This is the case with
  the 68000.
• Examples
• MOVE.B D0, ad output the least significant 8
  bits of D0 to the peripheral memory mapped at
  address ad
• MOVE.B ad, D3 input the 8-bit value from
  the peripheral memory mapped at address ad to the
  least significant 8 bits of D3

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Addressing Modes

• The method by which an operand is encoded into an
  instruction is known as addressing mode. There
  are many different modes and several of these are
  described below.
• Direct or absolute addressing mode
• The simplest way of encoding the address
  information is to directly encode the address as
  a bit patterns in the opcode field. This is known
  as direct or absolute addressing shown below. For
  example if the address 1020 decimal was to be
  encoded in a 16-bit field then the bit pattern in
  the instruction would be 0000001111111100. The
  size of the address fields determines the largest
  address which can be stored and hence the amount
  of memory which can be addressed by that
  instruction.

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• Examples
• MOVE.W 122, D5 move the 16-bit contents of
  memory locations 122 to register D5

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• Indirect addressing mode
• The designer may wish to use indirect addressing
  to reduce the number of bits needed to specify an
  operand. In indirect addressing shown below, the
  address quoted in the operand field is not the
  address of the required operand.
• In general the actual address of the operand is
  called the effective address and for this
  addressing mode, is obtained by performing a read
  operation on the address specified in the
  operation field.
• One reason for using indirect addressing is to
  save bits in an address. The address quoted in an
  instruction is not usually a memory address but a
  register addresses which requires fewer bits. The
  way this address is interpreted is to split the
  operand field into two fields, one defining the
  addressing scheme to be used to calculate the
  effective address of the operand and the other
  used to specify the address to be used as the
  effective address calculation, that is a register
  address.
• Examples
• MOVE.B (A0), D6 move the byte from the memory
  address contained on A0 to the least significant
  bits of D6
• MOVE.W D3, (A4) Move the least significant
  bits of D3 to the memory word whose address is in
  A4

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• Examples
• MOVE.B (A0), D6 move the byte from the memory
  address contained on A0 to the least significant
  bits of D6
• MOVE.W D3, (A4) Move the least significant
  bits of D3 to the memory word whose address is in
  A4

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• Autoincrement mode
• The action when using this addressing mode is the
  same as for indirect addressing except that that
  register used in incremented after the effective
  address has been calculated as shown below.
• The action of this addressing mode could be
  simulated by using the required instruction with
  indirect addressing and then an extra instruction
  to increment the register contents if
  autoincrement is not supported on a particular
  processor.
• Note that the register contents are incremented
  by a constant, which depends on the size of the
  data item being accessed by the instruction. On
  the 68000 the increment is 1, for byte operands,
  2 for word operands and 4 for longword operands.
  This is to align the pointer value in the
  register to the next item of data is 1,2, or 4
  bytes away, respectively.

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• Examples
• MOVE.W (A0),D2 move the contents of the
  memory word whose address is in A0 toD2 and then
  increment the contents of A0 by 2
• MOVE.B D1 (A1) move the least-significant 8
  bits of D1 to the memory locaton whose address is
  in A! and then increment the contents of A1 by 1.

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• Autodecrement Mode
• The action when using this addressing mode is the
  same as indirect addressing excepts that the
  register used is decremented before the effective
  address is calculated as shown below. The amount
  by which h the register is decremented is
  determined in exactly the same way as for
  autoincrement addressing.
• Examples
• MOVE.L (A2),D3 subtract 4 from the contents of
  A2 and then move the longword at the memory
  location whose address is contained in A2 to D3
• MOVE.B (A1),D4 subtract 2 from the contents of
  A1 and then move the byte at the memory
  location whose address is contained in A1 to D4

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