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Oct241

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Determine the min. W/L ratios of Q5 and Q6 to ensure that the FF will switch ... Clocked RS FF. Oct24-7. Laboratory of Reliable Computing. DFFs. Non-overlapping Clock ... – PowerPoint PPT presentation

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Title: Oct241


1
Multivibrator Circuits
  • Dr. T.Y. Chang
  • NTHU EE
  • 2007.11.13

2
Contents
  • Multivibrator
  • Text Book Sedra/Smith V.5 Chapter 11.1

3
Latches and FFs
  • Bi-stable

4
RS FF
5
Ex 11.1 Determine (W/L) Ratio
  • Determine the min. W/L ratios of Q5 and Q6 to
    ensure that the FF will switch
  • Given k, Vt, (W/L)Inv
  • Sol

Figure 11.4 The relevant portion of the
flip-flop circuit of Fig. 11.3 for determining
the minimum W/L ratios of Q5 and Q6 needed to
ensure that the flip-flop will switch.
6
SRAM Cell
  • Static Random Access Memory Cell
  • Clocked RS FF

7
DFFs
  • Non-overlapping Clock

8
DFFs (Cont.)
9
Multivibrator
  • Monostable multivibrator (One-shot)
  • One stable state
  • One quasi-stable state
  • Produce a fixed pulse T
  • Astable
  • No stable state

10
RC Charge/Discharge Equation
  • V(t)VF - (VF-VS)e-t/(RC)
  • Final V Init. V

VF
V
GND
VS
V(t) with init. value
VF
V(t)
VS
time
t
11
A CMOS Monostable Circuit
  • Protection Diode Circuit and Equivalent Circuit

12
Operation Timing Diagram
13
At the point of first VIH
1/(j?C)0
Vo1VDDRon/(RRon)
At this moment
?V1VDDR/(RRon)
14
At the Duration of Vo1L
V(t)VF - (VF-VS)e-t/(RC)
VI2VDD-(VDD-VDDRon/t) e-t/(tC) Vo1VDDRon/t
e-t/(tC) t RRon
At this duration
15
When VI2 reaches Vth
VDDVD1
Fig. 11.14 Circuit that applies during the
discharge of C (at the end of the monostable
pulse interval T).
16
Timing Calculation
  • Calculate T (and recovery time)
  • V(t)VF - (VF-VS)e(-t/RC)

Recovery time
T
V(t)VthVDD -?V1e(-T/tC)
TC(RRon) lnR/(RRon) VDD/(VDD-Vth)
V(t)1.02VDDVDD VD1e(-Trcv/tC)
17
Astable Multivibrator
  • Calculate T
  • V(t)VF - (VF-VS)e(-t/RC)

18
Ring Oscillator
Odd Number of Inverters
T2NtP
19
HW6
  • A multi-vibrator circuit consisted of two
    inverters (logic-1VDD logic-00V threshold Vth
    VDD/2), one resistor with value R and a
    capacitor with value C is connected as follows.
  • Two inverters are cascaded in series with three
    nodes A, B, D
  • Node A is the 1st inverters input
  • Node B is the output of the 1st inverter and also
    the input of 2nd inverter
  • Node D is the output of the 2nd inverter
  • Resistor R is inserted between nodes A and B
  • Capacitor C is inserted between nodes A and D.
  • (hint this is an astable multi-vibrator)
  • Briefly draw the figure of this scheme
  • Show the output waveform in nodes A, B, and D.
  • Calculate the period in node D.
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