CS535 Final Project: ATAPI aka IDE Interface within an FPX Module

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CS535 Final ProjectATAPI (aka IDE) Interface
within an FPX Module

• November 14, 2001
• Benjamin West
• Computer Communications Research Center (CCRC)
• Qiong Zhang
• Magnetic Information Sciences Center (MISC)
• http//zeus.doc.wustl.edu/cs535.shtml

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ATAPI on FPX Module
Host ATAPI Controller

FPX
RAD
NID
Loopback module
ATAPI bus
ATAPI_to_ATM module
RAD test pins
Hard drive
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ATAPI on FPX Module
Host ATAPI Controller

FPX
RAD
NID
Loopback module
ATAPI bus
ATAPI_to_ATM module
RAD test pins
Hard drive
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ATAPI on FPX Module
Host ATAPI Controller

FPX
RAD
NID
Loopback module
ATAPI bus
ATAPI_to_ATM module
RAD test pins
Hard drive
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ATAPI Module (up close)
ATAPI_to_ATM module
ATAPI FSM
ATM_out FSM
ATAPI bus
Out to NID
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Issues to Resolve

• Deciphering ATAPI protocol
• Synchronization
• (ATAPI bus and RAD in separate clock domains)
• Electrical Signal Compatibility
• (ATAPI bus is 5V, RAD is 3.3V gt conversion
  needed)
• Throughput achievable thru module, and what sort
  of buffering needed.

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Future Work (i.e. if we can get to it)

• Filter snooped ATAPI traffic to extract only
  relevant information
• Process ATAPI data as it streams thru module
  (string matching, en/decoding, etc.)
• Initiate ATAPI transactions from RAD, i.e. make
  RAD a slave ATAPI device.