Title: Chapter 5 Internal Memory
1Chapter 5Internal Memory
2Semiconductor Memory Types
3Semiconductor Memory
16Mbit DRAM
4Static RAM (SRAM)
- Desired for main memory
- Used in cache
- Basically an array of flip-flops
- Simple to interface and control
- Fast
- Relatively low density - complex
- Relatively expensive
5Static RAM model
6Dynamic RAM (DRAM)
- Used in main memory
- Bits stored as charge in capacitors
- Essentially analog device
- Charges leak
- Need refreshing even when powered
- Need refresh circuits
- Higher density (more bits per chip)
- Slower than Static RAM
- Less expensive
7Dynamic RAM model
8Read Only Memory (ROM)
- Permanent storage
- Nonvolatile
- Microprogramming (see later)
- Library subroutines
- Systems programs (BIOS)
- Function tables
9Types of ROM
- ROM Written during manufacture
- Very expensive for small runs
- PROM Programmable (once)
- Needs special equipment to program
- Read mostly
- EPROM Erasable Programmable
- Erased by UV
- EEPROM Electrically Erasable
- Takes much longer to write than read
- Flash memory
- Erase whole memory (block) electrically
10EPROM
11Memory Organization
- A 16Mbit chip can be organised as 1M of 16 bit
words - A bit per chip system has 16 lots of 1Mbit chip
with bit 1 of each word in chip 1 and so on - A 16Mbit chip can be organised as a 2048 x 2048 x
4bit array - Reduces number of address pins
- Multiplex row address and column address
- 11 pins to address (2112048)
- Adding one more pin doubles range of values so x4
capacity
12Typical 16 Mb DRAM (4M x 4)
13Semiconductor Memory
16Mbit DRAM
14Refreshing
- Refresh circuit is included on the chip
- Count through rows
- Read Write back
- Chip must be disabled during refresh
- Takes time
- Slows down apparent performance
15256kByte Module Organisation
161MByte Module Organisation
17Error Detection/Correction
- Errors
- Hard Failure
- Permanent defect
- Soft Error
- Random, non-destructive
- No permanent damage to memory
- Coding (example Hamming code) can be used for
- - Error detection
- - Error correcting
18Error Correcting Code Function
19Hamming Code
Visualizing
With even parity
Word
Identifying error
With Error
20Hamming Code
- To store an M bit word with detection/correction
takes MK bit words - If K 1, we can detect single bit errors but not
correct them - If 2K - 1 gt M K , we can detect and
correct single bit errors, - i.e. detect an error and identify which bit
it is. - Example for M 8
- for K 3 23 1 lt 8 3
- for K 4 24 1 gt 8 4
- Therefore, choose K 4
-
21Increased word length for error correcting
22Layout of Data and Check Bits
C1 is a parity check on every data bit whose
position is xxx1 C2 is a parity check on every
data bit whose position is xx1x C4 is a parity
check on every data bit whose position is x1xx C8
is a parity check on every data bit whose
position is 1xxx
Why? Because we want the syndrome, the Hamming
test word, to yield the address of the error.
23Improvements in memory
- RAM continually gets denser.
- DRAM Several improvements
- SDRAM synchronous DRAM
- DDR-SDRAM - doubles transfer speed
- RDRAM asynchronous one transfer
- per clock cycle
24Comparison of improved DRAM
Conventional DRAM 40 to 100 MB/S transfer
rate?
25Synchronous DRAM (SDRAM)
- Access is synchronized with an external clock
- Address is presented to RAM
- RAM finds data (CPU waits in conventional DRAM)
- Since SDRAM moves data in time with system clock,
CPU knows when data will be ready - CPU does not have to wait, it can do something
else - Burst mode allows SDRAM to set up stream of data
and fire it out in block - DDR-SDRAM sends data twice per clock cycle
(leading trailing edge)
26SDRAM Read Timing
27SDRAM
28DDR SDRAM
- SDRAM can only send data once per clock
- Double-data-rate SDRAM can send data twice per
clock cycle - Rising edge and falling edge
29RAMBUS
- Adopted by Intel for Pentium Itanium
- Main competitor to SDRAM
- Separate bus (hence the name RAMBUS)
- Bus addresses up to 320 RDRAM chips at 1.6Gbps
- Asynchronous block protocol
- Precise control signal timing
- 480ns access time
- Then 1.6 Gbps
30RAMBUS Diagram
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