How the 68K Handles Exceptions

1
How the 68K Handles Exceptions Background Member
s of the 68K family operate either in the
supervisor state or the user state. The operating
system runs in the supervisor state and user or
applications programs in the supervisor state.
This mechanism protects the operating system from
errors in applications programs. In this
presentation we demonstrate what happens when an
exception is encountered and processed. When a
68K microprocessor is in the supervisor state,
its S-bit in the status register is set to 1.
When the 68K is in the user state its S-bit is
set to 0. When S 1 the supervisor stack
pointer, SSP, is in use, and when S 0 the user
stack pointer, USP, is in use. However, as only
one stack pointer can be active at any instant,
you can write either A7 or SP to indicate the
stack pointer. Any exception or interrupt
(hardware or software) forces the 68K into the
supervisor state. Note that the 68000 will remain
in the supervisor state if it was already in that
state when the exception occurred.
2

• Following an exception, the S-bit is set to 1 and
  the supervisor state stack pointer selected. The
  pre-exception state of the status register
  (containing both the old S-bit and the CCR) is
  pushed on to the supervisor stack. The program
  counter (i.e., the return address is also pushed
  on the stack). The return address and status
  register are saved to enable the processor to
  return to its pre-exception state after the
  exception has been handled.
• At the end of the exception an RTE (return from
  exception instruction) restores the program
  counter and status register and the processor
  continues in the state it was in prior to the
  exception.
• An exception and subroutine call are very
  similar. The differences are
• 1. The subroutine has an address (e.g., BSR XYZ),
  whereas an exception calls a handler whose
  location is pre-determined.
• 2. The subroutine saves only the return address,
  whereas the exception saves the processor status
  in the status register, SR, as well.
• 3. The subroutine does not affect the processor's
  state, whereas an exception always selects the
  supervisor state.

3
Each type of 68K exception is associated with a
location of 256 longwords in the 256 Kbyte region
000000 to 00003FF. This region is called "the
exception vector table" for example, a line A
exception is associated with memory location 00
0028. This address is determined by the chip
manufacturer and can't be changed. The operating
system must store a pointer to the line A
exception handler in location 00 0028 when the
computer is first booted up. Example The 68K
supports several types of exception (e.g., an
error due to an illegal opcode, an attempt to
execute a privileged instruction while in the
user state, an operating system call, a hardware
interrupt, etc.). In this example we are going to
use a "line A" exception, so-called because it is
like an instruction that begins with the binary
sequence 1010. which is "A" in hexadecimal. Any
op-code (i.e., instruction) beginning with the
bit pattern 1010 causes an exception. This
facility makes it possible for a user programmer
to call an operating system facility.
Essentially, it allows you to design "new
instruction" that can be implemented by the
operating system either in software or by
external hardware. Suppose we create a new
instruction to calculate 2x2 5. We will give
this instruction the binary code
10100000000000002 (i.e., A000). We can insert
this new instruction in a stream of code by
4
CalcVal EQU A000 Give the new instruction
a name . . DC.W CalcVal
Insert the new op-code here We will also write
an exception handler for this code. NewCode MULU
D0,D0 Calculate D02 ASL.L 1,D0
Shift D0 left to multiply by 2 ADD.L
5,D0 Add 5 to get 2D02 5 ADD.L
2,2(A7) Fix return address on the RTE
Return from exception This block of
code is just like a conventional subroutine,
except that it ends with RTE rather than RTS. The
operation ADD.L 2,2(A7) adds the number 2 to the
longword that is 2 bytes below the stack pointer
(i.e., it increments the return address on the
stack). This operation is required because a line
A exception saves its own address on the stack,
rather than the correct return address. We now
write a test program to demonstrate how
exceptions are implanted and handled. This simple
example is intended to demonstrate only the
principles. A real exception handler might have
to deal with recovery following a crash. However,
some exception handlers are not much more complex
than the one we describe here.
5
The following provides a complete test program.
We have assembled it to enable you to view the
address of the instructions and data.
1 0000A000 CALCVAL EQU A000
Let's give the new instruction a name 2
00000028 ORG 0028
Select the line A pointer address 3 00000028
0000041A DC.L NEWCODE and put a
pointer to the handler in it 4 00000400
ORG 400 The program goes
here 5 00000400 4FF82020 LEA
2020,A7 Let's set the SSP to 2020 6
00000404 46FC0000 MOVE.W 0,SR
Clear the SR to set S 0 for user state 7
00000408 4FF83020 LEA 3020,A7
Let's set the USP to 3020 8
9 0000040C 203C00000004 MOVE.L
4,D0 Set up a dummy value in D0 10
Now call
the exception 11 00000412 A000
DC.W CALCVAL This will insert the new op-code
here 12 13 00000414
4E71 NOP Just a dummy
op-code (NOP no operation) 14 00000416 4E71
NOP And another one 15
00000418 60FE MYSELF BRA MYSELF
Let's get stuck in a loop 16
17
This is the line A
exception handler 18 0000041A C0C0
NEWCODE MULU D0,D0 Calculate D02 19
0000041C E380 ASL.L 1,D0
Shift D0 left to multiply by 2 20 0000041E
5A80 ADD.L 5,D0 Add 5 to get
2D02 5 21 00000420 06AF00000002 ADDI.L
2,2(A7) Fix the return address on the stack
0002 22 00000428 4E73
RTE Return from
exception 23 24
00000400 END 400 End of
program (and code starting point)
6
We are now going to execute the test program. The
purpose of this demonstration is to explain what
happens when an exception is detected,
processed, and a return from exception made. In
the following figures we show the 68000 CPU, the
state of its S-bit, and its user and supervisor
stack pointers. We also show both the user and
supervisor stacks. The code being executed is
provided by each figure. The state of the CPU is
shown at the end of the instruction (or group of
instructions) highlighted.
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LEA 2020,A7 Set the SSP to 2020 MOVE.W 0,SR S
et S 0 for user state LEA 3020,A7 Set the
USP to 3020 MOVE.L 4,D0 Set up a dummy value
in D0 DC.W CalcVal Insert new op-code
here NOP Dummy operation NOP MySelf BRA MySe
lf Let's get stuck in a loop The line A
exception handler NewCode MULU D0,D0 Calculate
D02 ASL.L 1,D0 Multiply D0 by
2 ADD,L 5,D0 Add 5 to get 2D02
5 ADD.L 2,2(A7) Fix return address RTE Return
from exception
8
Initially, the 68000 starts in the supervisor
state (S 1). A7 represents the supervisor stack
with the value 00A00000 (this value is
automatically set by the simulator). The state of
the registers before the first instruction
is PC000400 SR2000 SS00A00000 US00000000
X0 A000000000 A100000000 A200000000
A300000000 N0 A400000000 A500000000
A600000000 A700A00000 Z0 D000000000
D100000000 D200000000 D300000000 V0
D400000000 D500000000 D600000000 D700000000
C0 ----------gtLEA.L 2020,SP At the end of
the first instruction, we have set up the
supervisor stack pointer and the state of the
system is
PC000404 SR2000 SS00002020 US00000000
X0 0000202000000000 s A000000000 A100000000
A200000000 A300000000 N0 0000202400000000
s4 A400000000 A500000000 A600000000
A700002020 Z0 0000202800000000
s8 D000000000 D100000000 D200000000
D300000000 V0 0000202C00000000
s12 D400000000 D500000000 D600000000
D700000000 C0 0000203000000000
s16 ----------gtMOVE 00,SR
The next slide shows the effect of the MOVE
00,SR and LEA 3020,A7 instructions.
9
LEA 2020,A7 Set the SSP to 2020 MOVE.W 0,SR S
et S 0 for user state LEA 3020,A7 Set the
USP to 3020 MOVE.L 4,D0 Set up a dummy value
in D0 DC.W CalcVal Insert new op-code
here NOP Dummy operation NOP MySelf BRA MySe
lf Let's get stuck in a loop The line A
exception handler NewCode MULU D0,D0 Calculate
D02 ASL.L 1,D0 Multiply D0 by
2 ADD,L 5,D0 Add 5 to get 2D02
5 ADD.L 2,2(A7) Fix return address RTE Return
from exception
Supervisor mode
User mode
S 1
S 0
Stack pointer
Stack pointer
A7 3020
A7 2020
Supervisor stack
User stack
CPU
CPU
S 1
S 1
2020
3020
10
As you can see from the previous slide, the
system had entered the user state and the user
stack pointer has been set up (we dont actually
use the user stack in this example). By loading
the status register with 0, we set the S-bit to
zero to select the user state. If we trace the
MOVE 00,SR and LEA 3020,A7 instruction we get
PC000408 SR0000 SS00002020 US00000000
X0 A000000000 A100000000 A200000000
A300000000 N0 A400000000 A500000000
A600000000 A700000000 Z0 D000000000
D100000000 D200000000 D300000000 V0
D400000000 D500000000 D600000000 D700000000
C0 ----------gtLEA.L 3020,SP Tracegt PC000
40C SR0000 SS00002020 US00003020 X0
0000302000000000 s A000000000 A100000000
A200000000 A300000000 N0 0000302400000000
s4 A400000000 A500000000 A600000000
A700003020 Z0 0000302800000000
s8 D000000000 D100000000 D200000000
D300000000 V0 0000302C00000000
s12 D400000000 D500000000 D600000000
D700000000 C0 0000303000000000
s16 ----------gtMOVE.L 04,D0
11
The next slide shows the situation after the line
A exception has been taken. The S-bit has been
set to 1, the supervisor state entered, and the
status register and return address saved on the
supervisor stack. Remember that the return
address (for a line exception) is the address of
the exception itself). The following simulator
output gives the state before and after the
exception is taken.
Tracegt PC000412 SR0000 SS00002020 US00003020
X0 0000302000000000 s A000000000
A100000000 A200000000 A300000000 N0
0000302400000000 s4 A400000000 A500000000
A600000000 A700003020 Z0 0000302800000000
s8 D000000004 D100000000 D200000000
D300000000 V0 0000302C00000000
s12 D400000000 D500000000 D600000000
D700000000 C0 0000303000000000
s16 ----------gtDC.W A000 Tracegt PC00041A
SR2000 SS0000201A US00003020 X0
0000201A00000000 s A000000000 A100000000
A200000000 A300000000 N0 0000201E04120000
s4 A400000000 A500000000 A600000000
A70000201A Z0 0000202200000000
s8 D000000004 D100000000 D200000000
D300000000 V0 0000202600000000
s12 D400000000 D500000000 D600000000
D700000000 C0 0000202A00000000
s16 ----------gtMULU.W D0,D0
12
LEA 2020,A7 Set the SSP to 2020 MOVE.W 0,SR S
et S 0 for user state LEA 3020,A7 Set the
USP to 3020 MOVE.L 4,D0 Set up a dummy value
in D0 DC.W CalcVal Insert new op-code
here NOP Dummy operation NOP MySelf BRA MySe
lf Let's get stuck in a loop The line A
exception handler NewCode MULU D0,D0 Calculate
D02 ASL.L 1,D0 Multiply D0 by
2 ADD,L 5,D0 Add 5 to get 2D02
5 ADD.L 2,2(A7) Fix return address RTE Return
from exception
Supervisor mode
User mode
S 1
S 0
Stack pointer
Stack pointer
A7 3020
A7 201A
User stack
CPU
CPU
S 1
S 1
3020
13
In the next slide, the code of the line A
exception handler is executed. These operations
all take place in the supervisor state. The
following traces the execution of these
instructions.
Tracegt PC00041C SR2000 SS0000201A US00003020
X0 0000201A00000000 s A000000000
A100000000 A200000000 A300000000 N0
0000201E04120000 s4 A400000000 A500000000
A600000000 A70000201A Z0 0000202200000000
s8 D000000010 D100000000 D200000000
D300000000 V0 0000202600000000
s12 D400000000 D500000000 D600000000
D700000000 C0 0000202A00000000
s16 ----------gtASL.L 01,D0 Tracegt PC00041E
SR2000 SS0000201A US00003020 X0
0000201A00000000 s A000000000 A100000000
A200000000 A300000000 N0 0000201E04120000
s4 A400000000 A500000000 A600000000
A70000201A Z0 0000202200000000
s8 D000000020 D100000000 D200000000
D300000000 V0 0000202600000000
s12 D400000000 D500000000 D600000000
D700000000 C0 0000202A00000000
s16 ----------gtADDQ.L 05,D0 Tracegt PC000420
SR2000 SS0000201A US00003020 X0
0000201A00000000 s A000000000 A100000000
A200000000 A300000000 N0 0000201E04120000
s4 A400000000 A500000000 A600000000
A70000201A Z0 0000202200000000
s8 D000000025 D100000000 D200000000
D300000000 V0 0000202600000000
s12 D400000000 D500000000 D600000000
D700000000 C0 0000202A00000000
s16 ----------gtADDI.L 02,02(SP)
14
LEA 2020,A7 Set the SSP to 2020 MOVE.W 0,SR S
et S 0 for user state LEA 3020,A7 Set the
USP to 3020 MOVE.L 4,D0 Set up a dummy value
in D0 DC.W CalcVal Insert new op-code
here NOP Dummy operation NOP MySelf BRA MySe
lf Let's get stuck in a loop The line A
exception handler NewCode MULU D0,D0 Calculate
D02 ASL.L 1,D0 Multiply D0 by
2 ADD,L 5,D0 Add 5 to get 2D02
5 ADD.L 2,2(A7) Fix return address RTE Return
from exception
Supervisor mode
User mode
S 1
S 0
Stack pointer
Stack pointer
A7 3020
A7 201A
User stack
CPU
CPU
S 1
S 1
3020
15
In the next slide the return from exception
instruction is executed and the return address
and status register pulled from the supervisor
stack. This operation returns the 68000 to its
pre-exception user state. The trace output shows
the before RTE and after RTE state of the
processor.
Tracegt PC000428 SR2000 SS0000201A US00003020
X0 0000201A00000000 s A000000000
A100000000 A200000000 A300000000 N0
0000201E04140000 s4 A400000000 A500000000
A600000000 A70000201A Z0 0000202200000000
s8 D000000025 D100000000 D200000000
D300000000 V0 0000202600000000
s12 D400000000 D500000000 D600000000
D700000000 C0 0000202A00000000
s16 ----------gtRTE Tracegt PC000414 SR0000
SS00002020 US00003020 X0
0000302000000000 s A000000000 A100000000
A200000000 A300000000 N0 0000302400000000
s4 A400000000 A500000000 A600000000
A700003020 Z0 0000302800000000
s8 D000000025 D100000000 D200000000
D300000000 V0 0000302C00000000
s12 D400000000 D500000000 D600000000
D700000000 C0 0000303000000000
s16 ----------gtNOP
16
LEA 2020,A7 Set the SSP to 2020 MOVE.W 0,SR S
et S 0 for user state LEA 3020,A7 Set the
USP to 3020 MOVE.L 4,D0 Set up a dummy value
in D0 DC.W CalcVal Insert new op-code
here NOP Dummy operation NOP MySelf BRA MySe
lf Let's get stuck in a loop The line A
exception handler NewCode MULU D0,D0 Calculate
D02 ASL.L 1,D0 Multiply D0 by
2 ADD,L 5,D0 Add 5 to get 2D02
5 ADD.L 2,2(A7) Fix return address RTE Return
from exception
Supervisor mode
User mode
S 1
S 0
Stack pointer
Stack pointer
A7 3020
A7 201A
Supervisor stack
User stack
CPU
CPU
Status register
201A
S 0
S 1
Return address
201C
2020
3020
17
The final slide shows the 68000 continuing in its
pre-exception state. The instruction NOP (no
operation) is a dummy instruction that doesnt do
anything. This instruction is a filler used to
create a short delay or to allow you to insert
code in a program at a later date.
18
LEA 2020,A7 Set the SSP to 2020 MOVE.W 0,SR S
et S 0 for user state LEA 3020,A7 Set the
USP to 3020 MOVE.L 4,D0 Set up a dummy value
in D0 DC.W CalcVal Insert new op-code
here NOP Dummy operation NOP MySelf BRA MySe
lf Let's get stuck in a loop The line A
exception handler NewCode MULU D0,D0 Calculate
D02 ASL.L 1,D0 Multiply D0 by
2 ADD,L 5,D0 Add 5 to get 2D02
5 ADD.L 2,2(A7) Fix return address RTE Return
from exception
Supervisor mode
User mode
S 1
S 0
Stack pointer
Stack pointer
A7 3020
A7 201A
Supervisor stack
User stack
CPU
CPU
Status register
201A
S 0
S 1
Return address
201C
2020
3020