Overview

1
Chapter 8

• Overview
• Programmed I/O
• Interrupt Driven I/O

2
Digressing

• How do you do the following in the LC-3 ?
• (good test question ?)
• Shift left
• Rotate left
• Shift right
• Rotate right

3
One Pass vs Two Pass Assemblers

• Two Pass Checks for syntax errors and builds
  the Symbol Table during first pass, resolves
  operand addresses during second pass.
• One Pass Checks for syntax errors, builds the
  Symbol Table, and resolves operand addresses
  during the first pass. So why have a two pass?

4
More than One Object (Load) File

• Symbol Table
• Symbols External Imports Addresses
• Start
  x3000
• Number
  x300A
• Data Data
  x300D
• Value ?

• The Linker/Loader would generate another
  global table to resolve
• Externals Exports at Load time

5
Input / Output
Memory Mapped I/O A section of the memory
address space is reserved for I/O Registers
rather than general memory locations. Think of
it as pseudo memory. The same instructions are
used for general programming and I/O
programming. Non-Memory Mapped I/O There is a
separate address space for I/O programming, and
an entirely separate set of I/O Instructions.
6
LC-3 has Memory Mapped I/O
LC-3 Memory Layout x0000 x00FF Trap
vectors x0100 x2FFF System Programs
Data x3000 xFDFF User Programs
Area xFE00 xFFFF I/O Programming
Registers
7
Synchronous vs Asynchronous I/O
Synchronous latest value of data could be
expected to be available when the program wanted
it. It might be periodically updated at a know
frequency. This is not typical nor usually
realistic for I/O. Asynchronous computer is
generally much faster than I/O so program must
wait until requested data is available or data
provided has been taken. Handshaking is used
to ensure that data is available or I/O device is
ready.
8
Polling vs Interrrupt Driven I/O
Polling program checks handshaking signals to
find when data is available of device is done
(typically a loop in the program) Interrupt
program initiates I/O and waits until data is
available (typically goes to sleep until the
operating system wakes the program up)
9
Keyboard Input Interface
10
Keyboard Input Registers
KBDR Assigned to xFE02 Data is in
KBDR70 Read only Register KBSR
Assigned to xFE00 Status is in
KBSR15 Set to 1 when new
data is ready Cleared when
data is read
11
Simple Program to Input from Keyboard
START LDI R1, A Test for
BRzp
START character input LDI
R0, B BRnzp NEXT_TASK
Go to the next task A .FILL xFE00
Address of KBSR B .FILL
xFE02 Address of KBDR
12
Monitor Output Interface
13
Monitor Output Registers
DDR Assigned to xFE06 Data is
in DDR70 DSR Assigned to xFE04
Status is in DSR15 Set
to 1 when data is picked up
Cleared when new data is written
14
Simple Program to Ouput to Monitor
START LDI R1, A Test to see
if BRzp START output
register is ready STI R0,
B BRnzp NEXT_TASK A
.FILL xFE04 Address of DSR B
.FILL xFE06 Address of DDR
15
LC-3 Memory Mapped I/O
16
Echo from Keyboard to Monitor
START LDI R1, KBSR Test for
character input BRzp
START LDI R0,
KBDR ECHO LDI R1, DSR
Test output register ready BRzp
ECHO STI R0,
DDR BRnzp NEXT_TASK
KBSR .FILL xFE00
Address of KBSR KBDR .FILL xFE02
Address of KBDR DSR
.FILL xFE04 Address of DSR
DDR .FILL xFE06 Address
of DDR
17
The I/O Routine for the LC-3 Keyboard
START ST R1,SaveR1 Save registers
needed ST R2,SaveR2 by this
routine ST R3,SaveR3 LD
R2,Newline L1 LDI R3,DSR BRzp
L1 Loop until Monitor is ready
STI R2,DDR Move cursor to new clean
line LEA R1,Prompt Starting
address of prompt string Loop LDR R0,R1,0
Write the input prompt BRz Input
End of prompt string L2 LDI
R3,DSR BRzp L2 Loop until
Monitor is ready STI R0,DDR
Write next prompt character ADD
R1,R1,1 Increment Prompt pointer
BRnzp Loop Get next prompt
character Input LDI R3,KBSR BRzp
Input Poll until a character is typed
LDI R0,KBDR Load input character
into R0 L3 LDI R3,DSR BRzp L3
Loop until Monitor is ready
STI R0,DDR Echo input character L4
LDI R3,DSR BRzp L4
Loop until Monitor is ready STI
R2,DDR Move cursor to new clean line
LD R1,SaveR1 Restore registers
LD R2,SaveR2 to original values
LD R3,SaveR3 BRnzp NEXT_TASK
Do the program's next task
18
The I/O Routine for the LC-3 Keyboard (2)
SaveR1 .BKLW 1 Memory for
registers saved SaveR2 .BKLW 1 SaveR3 .BKLW
1 DSR .FILL xFE04 DDR .FILL
xFE06 KBSR .FILL xFE00 KBDR .FILL
xFE02 Newline .FILL x000A ASCII code
for newline Prompt .STRINGZ "Input a
charactergt"
19
I/O Interrupts

• Requirements for a device to interrupt the
  processor
• The device must have the right to request service
• The I/O device must want service
• The device request must be at a higher priority
  than what is being done by the processor or is
  being requested by other devices
• The processor must be completed with the present
  instruction execution

20
Device(s) Generating Interrupt Request
21
Generating the LC-3 Interrupt Request
22
Servicing an Interrupt

• The following process is followed to service an
  interrupt
• The CPU enters the Supervisor State
• The context of the present program is saved
• (PC, PSW, SP)
• The device provides the address of location in
  the interrupt service routine table where the
  pointer to the service routine should reside.
• The Supervisor loads the address of the service
  routine into the PC
• The service routine is executed (ending with an
  RTI)
• The context of the original program is loaded and
  the original program resumed