CMC Model QA and Release Subcommittee Meeting Rob Jones

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CMC Model QA and ReleaseSubcommittee
MeetingRob Jones Colin McAndrewOctober
11, 2006
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Model QA Test Suite Updates

• Support for floating pins was added (dT node)
• Noise was not initially implemented, this has
  been added for all simulators
• Verilog-A model support implementation was not
  functional, this has been updated
• for Spectre (and Mica)
• is not supported in code for Spice3f5, Hspice,
  ADS
• Minor code clean-up and improvement
• Documentation updated and version1.2 released
• All issues noted previously have been addressed

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Model QA Test Suite Issues

• Use model
• Test suites for different models in different
  subdirectories
• Run tests from within each model subdirectory
• Requires testProgramName in example Makefile to
  be ../lib/runQaTests.pl instead of runQaTests.pl
  to obviate the need for users to manipulate PATH
• HSpice version is not being picked up in my
  testing
• Running 2006.03-SP1 on Linux and AIX

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PSP102.0 QA Test Spec Proposal

• What NFET PFET model parameter sets to use?
• Map PSP100.0 NFET model parameter set from CMC
  evaluation (IBM 90nm CMOS) to PSP102.0?
• Use default PSP102.0 NFET model parameter set?
• Reference results based on Verilog-A simulations
• Which simulator to use?
• Recommend HSpice
• Focus on global (geometrical) model first
• Generate tests for global (binning) local
  models later
• Rob Colin to provide model parameter set
  qaSpec file
• ASU to provide reference results for tests
  specified in qaSpec file

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PSP102.0 QA Test Spec Proposal, cont.

• I-V Tests
• Conductance Tests
• Capacitance Tests
• Noise Tests