RF Circuits and Architectures for Sensor Node Radios PicoRadioRF

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RF Circuits and Architectures for Sensor Node
RadiosPicoRadioRF

• Brian Otis, Yuen-Hui Chee, Richard Lu, Nate
  Pletcher, Jan Rabaey

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Outline

• Background
• Two Channel Transceiver
• Transmit Beacon
• Analog Baseband

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Goals/Philosophies

• Minimize energy cost (nJ/bit) of data
  transmission Why? - Finite energy density
  (J/mm3) of power sources.
• Need high levels of integration for reduced
  cost/form factor - Eliminate off-chip inductors,
  crystals, etc
• Use CMOS/MEMS co-design to relax specifications
  of (or eliminate) RF circuit blocks.
• Explore various transceiver architectures (TRF,
  superregenerative, etc)
• Develop reactive communication system

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Reactive Radio Overview
Main Radio
High data rate out
Wakeup signal
Reactive Radio

• Reactive radio detects broadcast wakeup signal
  and activates main radio for data transmission
• Tradeoff between reactive radio power consumption
  and false (or missed) detection of wakeup
  signals.

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Reactive Radio Requirements

• Ultra-low power receiver (50mW)
• Wakeup signal should not interfere with
  communicating nodes
• Integrates conveniently with main data radio
• Saves power over protocol-based methods of power
  cycling

Sleeping nodes
Wakeup broadcast
Communicating nodes
N. Pletcher
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MEMS/CMOS Co-design
Agilent Thin Film Bulk Acoustic Resonator
(FBAR) R. Ruby M. Frank
Radial Bulk Annular Resonator (RBAR)
100mm
Sense Electrode
Drive Electrode
Drive Electrode
Thin Piezoelectric Film
BSAC RBAR B. Bircumshaw A.P. Pisano O.M.
OReilly
Sense Electrode
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Project Status
Super-regenerative Rx
Smorgasboard transceiver
FBAR-based low power oscillator
Transmit Beacon
Summer 03
Feb 03
Dec 01
Dec 02
Sep 02
Dec 02
May 03
TX chain / RX test components
Analog BB Detection
2-Channel Prototype Transceiver
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prototype transceiver
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Prototype II Receiver
BB1
Env Det
RF
MEMS
BB1 Ref
LNA
RF Filter
BB2
Env Det
RF
MEMS
BB2 Ref

• Two Channels
• Channel Spacing 40MHz
• Sensitivity limited by detector noise
• Prototype Target 3mA _at_ 1V

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Prototype II Transmitter

• Two Channels
• OOK Modulation
• Non-linear PA
• 50 bias current duty cycle
• Directly Modulated Oscillators
• 0dBm Output

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Prototype II Transceiver

• Chips are back
• Board Design Done (Y.H. Chee, S. Mellers)
• Problem with Unsilicided Poly Resistors
• Dicing problem

PA Test
TX1
LNA Test
CH1
4mm
Passive Test Structures
Receiver
Diff Osc
Env Det Test
CH2
TX2
RF Amp Test
0.13mm ST CMOS
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LNA Schematic
No Source Degeneration - Input match to NQS Gate
Resistance
Input Impedance Match Transformer
R. Lu
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RF Amplifier
Forward gain
Reverse Isolation

• Ibias500mA
• Integrated active inductor
• RF Gain 18dB
• 3MHz RF Bandwidth
• FBAR parallel resonance matched to Tx oscillator
  frequency

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Low-Power Amplifier (LPA)
Co-design matching network with LPA for optimal
efficiency Use of low loss capacitive transformer
for impedance matching Cascoded transistor to
mitigate oxide breakdown and reduce loading
effects of the amplifier on the output tank
Y.H. Chee
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Differential Oscillator

• FBAR stabilized
• Self-Biased Load
• Large output swings achievable with 1V supply
• Efficient implementation of Transmitter or
  Super-Regenerative Receiver

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Transmit Beacon
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Transmit Beacon

• Goals
• Demonstrate a self contained 1.9GHz transmitter -
  powered only by Solar Vibrational scavenged
  energy
• Push integration limits - limited by dimensions
  of solar cell

With Shad Roundy, Dan Odell, Paul Wright S.
Mellers, F. Burghardt
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Transmit Beacon - RF
2mm

• Transmitter
• 0dBm to 50W
• (-1.5dBm measured at antenna)
• No Inductors, Crystals

to antenna
CMOS Tx
FBAR
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Results
Vstorage capacitor
Vrf_transmitted
1.2V
Vregulator
0V
Low Light
Two Weeks Later
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Analog Baseband Detection
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Baseband Architecture
BB1
Env Det
RF
MEMS
?
BB1 Ref
LNA
RF Filter
BB2
Env Det
RF
MEMS
BB2 Ref

• Explore entirely analog solution
• OOK modulation - no phase tracking needed
• Short packet communication - no frequency
  tracking algorithm needed
• Need timing synchronization at start of packet

with Fernando De Bernardinis, M. Josie Ammer
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Prototype Methodology
Custom Receiver Smorgasboard One channel receive
path _at_ 1.9GHz 2mW
Xilinx FPGA XCV600E Minimal logic to control
integrator timing
Anadigm FPAA ANx21E04 Reconfigurable Switched Cap
amp/filter/comparator array
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Timing Recovery/Detection Mapping
Integrators - Analog Early-Late Correlator /
Matched Filter
FPGA in (integrator reset)
Synch out
BB amplify filter
slicer
data out
bb in
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Results

• 20kbps
• 1m _at_ -15dBm Tx Power

• FPAA allows fast prototyping timing recovery
  algorithms
• FPAA blocks poorly characterized (NF, linearity)
• Map FPGA FPAA blocks to hardware

BB Output
Matched Filter Output
PHY Output
Tx BB
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Next

• Two Channel Transceiver Testing
• Further optimization of analog synch/detection
  algorithm
• Continued work with energy scavenging
• Circuit/MEMS co-design with BSAC resonators
• Superregenerative Radio - Tapeout Summer 2003