Paper by Randal E' Bryant, YirngAn Chen

1
Verification of Arithmetic Circuits with Binary
Moment Diagrams

• Paper by Randal E. Bryant, Yirng-An Chen
• Carnegie Mellon University 1995
• Presented by Michael Buttrick

2
Introduction

• There are many ways to represent functions
• Sum of Products (SOP) F abc abc ac
• Factored form Fc(d(eac) fg(de)
• Truth Tables
• Binary Decision Diagrams (BDD)
• AND-Inverter graph (AIG)
• Different representations have different
  strengths
• Canonicity
• Truth tables, BDDs
• Low complexity
• Factored form, BDDs
• Ease of manipulation is also a factor

3
Introduction

• BDDs have many useful properties
• Provide canonical representation
• Generally have a low complexity
• Can be manipulated symbolically
• Unfortunately, they also have drawbacks
• Limited to binary variables
• Cannot effectively represent multiplication at
  the bit level
• 16-bit multiplier BDD too large for memory
• Because of its strengths, efforts to extend BDD
  concept
• Boolean variables with non-Boolean ranges
• Integers, real numbers
• Limited success in the past (pre-1995)
• Structures grew exponentially with number of
  variables

4
Enter the BMD

• Binary Moment Diagrams (BMDs) similar to BDDs
• Boolean variables with non-Boolean ranges
• Variable evaluates to 1 or 0, but what function
  evaluates to is an integer (in this case)
• Overcomes shortcoming of BDDs

8-20z2y4yz12x24xz15xy
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Functional Decompositions

• Multi-Terminal Binary Decision Diagram (MTBDD)
• Based on pointwise decomposition
• Binary Moment Diagram (BMD)
• Based on linear expansion

6
Boole-Shannon Expansion

• Familiar Boole-Shannon expansion
• At each variable, decision is made based on
  cofactors
• For Boolean variables with Boolean ranges, leads
  to BDD
• If the function has a numerical range,
  generalized as
• Follows assumption that x will evaluate to 1 or 0
• Still a pointwise decomposition

7
Linear Moments

• Where is the linear moment of f
  w.r.t x
• Negative cofactor is the constant moment (f is
  constant w.r.t. x)
• Each vertex of a BMD describes its moment
  decomposition w.r.t the variable labeling the
  vertex
• The two arcs represent the linear and constant
  moments

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Example Functional Decomposition

• MTBDDs and BMDs use different compositions
• Note that leaf values correspond to coefficients
  of linear expression for MTBDDs
• Since BMD is moment based, relation is not as
  clear

9
Improving on BMDs

• BMD only encodes numeric values on terminal
  vertices
• Does not share common subexpressions in function
• Multiplicative edge weights are introduced
• Allows reuse of common expressions
• Known as BMDs

2y4yz gt 2y(12z) 12x24xz gt12x(12z)
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BMD Rules

• Edge weights
• Represented in square box on an edge
• Unlabeled edges have weight 1
• Edge weights multiplied together when traversing
  down
• Canonicity
• Edge weights of branches must be relatively prime
• Weight 0 only appear as a terminal value
• If this occurs, other branch must have weight 1
• Extra effort is worthwhile to decrease graph size

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Representations of Integers

• BMDs concisely represent words of data
• Vector of Boolean variables
  represent an integer X according to some encoding
• Unsigned binary, 2s complement, BCD
• Unsigned - sum of weighted bits
• 2s complement xn-1 has weight -2n-1
• Sign-Magnitude sum at x2 scales number by -1

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Word-Level Operations

• Arithmetic operations can be easily expressed
  with BMDs
• Graphs grow linearly with word size
• Addition sum of weighted bits
• xi, yi have weight 2i
• Multiplication sum of partial products
• PP of the form xi2iY
• Linear complexity regardless of variable ordering
• Much less important than in BDDs
• MTBDDs usually require exponential number of
  terminal vertices
• Terminal constants can be moved to edge in
  certain cases

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Representing Boolean Functions

• For verification, both word- and bit-level
  representations needed
• BMD is suitable for representing Boolean
  functions as well
• Special case of numerical function having
  restricted range
• Terminal constants moved to edges
• Complexity similar to BDD
• Can have weighted edges other than 1 or 0
• As long as function evaluates to 0 or 1
• This is not always the case
• Because they use different decomposition, BMD
• can be exponentially more complex than BDD and
• vice versa

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Verification Methodology

• Prove correspondence between logic circuit and
  specification
• Logic circuit Vector of Boolean functions
• Specification Word-level function
• Encoder 2s
• complement (eg.)
• Verify
• BMDs represent bit-
• and word-level function efficiently
• Makes them a suitable data structure for
  verification

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Hierarchical Verification

• Some circuits (multipliers) cannot be efficiently
  verified at the bit level
• Partitioned based on word-level structure
• Verified against word level specification
• Partitions are composed and compared to overall
  spec
• Each square contains AND gate and FA
• Vertical rectangles indicate partitioning
• With BDDs, result is that graph is equivalent to
  some known good graph
• Possible to formally verify with BMDs

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Abstracting Carry Save Adders

• Actual multiplier circuits often use CSAs
• Requires additional stage of FAs, shortens
  critical path
• CSAs can not be represented in terms of adds and
  multiplies
• Behavior cannot be directly abstracted to word
  level
• Correctness does not depend on individual CSA
  outputs
• Combined outcome can be modeled
• How often is a manual interpretation needed?
• Depend of the types of circuits being verified
• Overhead would depend on design size

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Experimental Results

• Motivation was to verify large multipliers
• 256-bit word sizes needing 653,000 gates verified
• Groundbreaking for automated verification
• Especially appealing because of prior results
• Using OBDDs, 15-bit multiplier needs 12 million
  vertices Ochi
• Increasing word size by one bit requires 2.7x
  vertices
• Special multiplier classes CSA NOR16 in 40
  mins, 12MB Burch
• Indexed-BDDs CAS NOR16 in 22 mins Jain

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Conclusions

• Provide more efficient mapping of arithmetic
  functions than MTBDDs
• Ability to represent bit and word level functions
• Makes BMD promising for verification of
  multipliers and other arithmetic circuits
• Promise for verifying floating point hardware
• Challenging because of floating point
  approximations
• May be suitable for matrix operations and
  spectral transforms
• Efficient equation solving applications like ILP
  not good candidates
• While all applications here have been for
  binary-valued variables, BMDs canonically
  represent multivariate linear functions
• Possible applications in symbolic algebra

19
References

• R. Bryant, Y. Chen, Verification of Arithmetic
  Circuits with Binary Decision Diagrams, 32nd
  Design Automation Conference, 1995, pp. 535-541
• H. Ochi, K. Yasuoka, and S. Yajima,
  Breadth-first Manipulation of Very Large Binary
  Decision Diagrams, International Conference on
  Computer-Aided Design, November, 1993, pp. 48-55
• J.R. Burch, Using BDDs to Verify Multipliers,
  28th Design Automation Conference, June, 1991,
  pp. 408-412
• J. Jain, J. Bitner, M. Abadir, J.A. Abraham, and
  D.S. Fussell, Indexed BDDs Algorithmic Advances
  in Techniques to Represent and Verify Boolean
  Functions, IEEE Transaction on Computers,
  November 1997.

Thank you! Questions?