Application Specific Systems Design and Prototyping

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Application Specific Systems Design and
Prototyping

• Luigi Carro
• Universidade Federal do Rio Grande do Sul
• Departamento de Engenharia Elétrica
• Agosto 1998
• carro_at_iee.ufrgs.br

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Synthesis of dedicated architectures

• HW is not the only problem
• what if questions
• open specifications
• Application specific processor
• tuned to application
• reprogrammable
• microarchitecture level
• High Level Language level

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Application Specific processors

• Speed increase with VLIW organization
• area and power savings only useful instructions
  are implemented
• costs reduction by integration of the system

Problem application software Contradiction it
is easy to make HW, not SW
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Application Specific Processors II

• Retargetable compilers
• try to generate an efficient compiler from HW
  architectural specifications
• bottom up approach
• who defines the architecture?
• Application and architecture are studied
  separately
• how efficient is the compiler in using the extra
  added features?

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Automatic Synthesis of HW and SW

• Possible in specific niches
• co-operating FSMs
• modem?
• SDL
• Siera
• operating system like framework
• complex applications mechanical arms
• There is a need for communication synthesis

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HW-SW codesign based on ASIPs
memory
processor

• Asip based designs
• without and without core-processor
• application program analysis dictates instruction
  set
• compiler must be created afterwards

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ASIP design process
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Core-processor HW-SW codesign
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Core processor based HW-SW codesign II

• Critical program segments are converted to HW
• the instruction set is not altered
• the compiler is the same, and calls to specific
  HW functions must be made

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Outline of the course

• Problem modeling, hardware modeling.
• Configurable HW families
• Application Specific System Design Tools
• Case Studies
• Microcontroller ASIPs
• Special Embedded compilers
• Conclusion

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MbSG tool
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MbSG tool

• Based on Risc microprocessor

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MbSG design flow
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MbSG optimizations I
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MbSG optimizations II
Not all problems have arithmetic behavior control
flow breaks pipeline
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MbSG optimizations III
Data driven optimizations HW function and
processor should work in parallel
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MbSG optimizations IV
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MbSG and other approaches

• New compiler is not needed
• optimizations developed at the instruction level
• instead of complex partitioning, program
  classification
• MbSG is in the middle of core based design space

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MbSG and other approaches
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MbSG results
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Application Specific Microcontroller

• Microcontrollers play a main role in present days
  Brazilian electronic systems industry
• Embedded control and automation system are
  equipped wiht the 8051 or DSP architectures
• to create new developments, those systems
  requires mainly, SW availability and
  mantainability.

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Application Specific Microcontroller

• Low cost in small and medium Industries must be
  achieved even with with a small number of parts
  per year, 10 thousand or less
• Old architectures like the 8051 are still largely
  used in the worldwide industry, because they
  have
• low cost
• large number of engineers trained to use them
• low cost SW available.

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Application Specific Microcontroller

• These architectures can be changed, and this is
  justified in
• an application where speed is premium or
• in the complete integration of a system
• In order to integrate the system, we removed some
  instructions of the 8051 instruction-set that
  were never used for specific applications.
• This change the original CISC architecture to a
  RISC approach, and gave us area by eliminating
  the decoders of that instructions.
• the saved area can be used to integrate the system

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Application Specific Microcontroller

• Two applications were tested
• motor vector control and
• a Profibus protocol for field-bus.
• Each program was analyzed statically (assembly
  source) and dynamically (really executed
  instructions).

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Instruction usage analysis

• Groups of often used instructions for the
  induction motor control

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Static analysis
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Dynamic analysis
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Area savings
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The pipelined version of the 8051

• The necessity of pipeline comes from the idea
  that not all instructions will be implemented
• RISC codes are greater than the CISC ones and
  pipeline serves to compensate this gap in terms
  of instruction speed execution
• Pipeline was applied in most used instructions
  and one special C compiler able to use only these
  instructions was developed

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Pipeline cycles
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Synthesis results
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The optimized C compiler

• CCC51 - C Cross Compiler to MCS8051 was optimized
  to work with a reduced instruction set.
• The compiler will generate only a few different
  instructions and will try to avoid breaking the
  pipeline

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Optimizations

• Three CCC51otimized versions were created
• CCC51 - I operand address modes and
  system stack optimization. Jump instructions
  that broke the pipeline were replaced by
  equivalents jumps instructions
• CCC51 - II replaces of some instructions types,
  include 3 bytes instructions that broke the
  pipeline. Ex MOV direct, direct
• CCC51 - III replaces MOV instructions which did
  not have accumulator as one of the operands.

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Number of needed instructions
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Number of Different instructions
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Photo of the board
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Outline of the course

• Problem modeling, hardware modeling.
• Configurable HW families
• Application Specific System Design Tools
• Case Studies
• Microcontroller ASIPs
• Special Embedded compilers
• Conclusion

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Conclusions I - doubts

• There is still not available a consolidated
  design methodology for application specific
  systems
• Design methodology should support
• executable specification
• allow SW and HW reuse
• allow fast technological migration
• Importance of IP is increasing
• where is the added value
• SW development will dominate designs

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Conclusion II - more doubts

• Will HW-SW codesign be a commercial reality?
• Is dedicated HW-SW synthesis really needed?
• Most examples claim processor is idle, and so?
• Will configurable devices be a real option for
  future designs based on unseen applications?
• Will CAD support fast configurability, so that
  SWHW?

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Time for lunch!

• To follow
• there will be exciting new developments to be
  studied
• system design is a really open issue

For more carro_at_iee.ufrgs.br until Friday, around
here
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