Title: Three-dimensional quantum transport simulation of ultra-small FinFETs
1Three-dimensional quantum transport simulation
of ultra-small FinFETs
- H. Takeda and N. Mori
- Osaka University
2Introduction
- FinFET Non-planar multiple gate MOSFET
- Quantum Mechanical Effects
- Direct S/D tunneling
- Subband quantization
- Phonon scattering
- Interface roughness
3D quantum transport simulation based on NEGF
method
33D NEGF Simulation
- Green痴 function
- Eigen-mode expansion method
3D electron density Electric current
Self-consistent calculation
4Scattering
- Intra-valley phonon scattering
- Constant matrix element
- Self-consistent calculation
Scattering function (Self energy)
Green痴 function (Correlation function)
- Random roughness patterns
- Gaussian form
Correlation length
Average displacement
5Device
Gate length
SiO2 thickness
Length
Source / Drain
Width
Gate
Height
6Electron Density
Electron density profile
Normalized electron density profile ( cross
section)
7Electron-Phonon Interaction
Electron density profile
8Device Characteristics
Ballistic
Phonon scattering
About 20 decrease (ION) Almost the same (IOFF)
characteristics
9Phonon Assisted Tunneling
Off-state
Phonon scattering reduces current
10Phonon Assisted Tunneling
Off-state
Phonon scattering reduces current
Phonon absorption enhances current
compensate
11Phonon Assisted Tunneling
On-state
Very low channel barrier
Phonon scattering reduces current
Tunneling current can be neglected
Drain current is reduced by phonon scattering
12Interface Roughness
without Roughness
Roughness affects current flow
with Roughness
13Effect of Interface Roughness
- Roughness 10 patterns
- Threshold voltage
Ballistic
Roughness
characteristics
14Summery
- We have simulated characteristics of
the gate-length FinFETs by 3D NEGF
simulation including the intra-valley phonon
scattering and the interface roughness. - The phonon scattering reduces only the
on-current. - The interface roughness affects not only the
on-current but also the off-current. - Large fluctuation of the threshold voltage is
caused by the interface roughness in the
ultra-small FinFETs.