Solution%20to%20Exercise%208 - PowerPoint PPT Presentation

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Solution%20to%20Exercise%208

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I == 3 : Dig2 Decode_Digit(TerminalInput) If Op == e' E 0 ... decode1. enable. 0. 1. 0. 0. 0. tmpwrite. nxtchar. Cond2. Cond1. Step. Input. Output. Op_Decode ... – PowerPoint PPT presentation

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Title: Solution%20to%20Exercise%208


1
Solution to Exercise 8
2
The algorithm
  • I 0 Op ? Decode_Op(TerminalInput)I 1
    Dest ? Decode_Dest(TerminalInput)I 2 Dig1 ?
    Decode_Digit(TerminalInput)I 3 Dig2 ?
    Decode_Digit(TerminalInput)
  • If Op e E ? 0
  • Tmp ?TerminalInput, I I1
  • (I 3) Tmp 20h (space)
  • RegDest ? Op(RegDest,Dig1)
  • I 0
  • (I4)
  • RegDest ? Op(Dig1,Dig2)
  • I 0

3
The algorithm
  • I 0 Op ? Decode_Op(TerminalInput)I 1
    Dest ? Decode_Dest(TerminalInput)I 2 Dig1 ?
    Decode_Digit(TerminalInput)I 3 Dig2 ?
    Decode_Digit(TerminalInput)
  • If Op e E ? 0
  • Tmp ?TerminalInput, I I1
  • (I 3) Tmp 20h (space)
  • RegDest ? Op(RegDest,Dig1)
  • I 0
  • (I4)
  • RegDest ? Op(Dig1,Dig2)
  • I 0

Execute ifCondition
4
The algorithm
  • I 0 Op ? Decode_Op(TerminalInput)I 1
    Dest ? Decode_Dest(TerminalInput)I 2 Dig1 ?
    Decode_Digit(TerminalInput)I 3 Dig2 ?
    Decode_Digit(TerminalInput)
  • If Op e E ? 0
  • Tmp ?TerminalInput, I I1
  • (I 3) Tmp 20h (space)
  • RegDest ? Op(RegDest,Dig1)
  • I 0
  • (I4)
  • RegDest ? Op(Dig1,Dig2)
  • I 0

Put resultin the reg Written in dest
5
Register sizes
  • Op 2 bit
  • Dest 2 bit
  • Dig1 8 bits
  • Dig2 8 bits
  • a to d 8 bits
  • Tmp 8 bits
  • E 1

6
Cond2
Cond1
7
Control of the circuit
  • NextChar
  • Decode1Enable
  • Decode2Enable
  • Mux2
  • Mux3
  • Iwrite
  • Tmpwrite

8
The control of the circuit
Input
Output
E Step Cond1 Cond2 nxtchar decode1enable decode2enable MUX2 MUX3 Iwrite tmpwrite
1 0 0 0 1 1 0 0 0 0 0
1 1 0 0 0 0 0 0 0 0 0
1 2 0 0 1 0 0 0 0 1 1
1 3 1 0 0 0 1 1 0 0 0
1 3 0 1 0 0 1 0 1 0 0
9
Op_Decode
Input Output
01100001(61h a) 00
01110011(73h s) 01
01100101(65h e) 11
10
Dest_Decode
Input Output
01100001(61h a) 00
01110010(62h b) 01
01100011(63h c) 10
01100100(64h d) 11
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