MATCHING OF RESISTORS

1
7 MATCHING OF RESISTORS AND CAPACITORS
2

• R, C in IC chips The absolute values can vary
  20 to 30 from the intended value.
• The mismatches among R or C, however, can be
  controlled within 1, or even 0.1

3
7.1 DEFINITION OF MISMATCH (x2/x1)
(X2/X1) x2/x1 d ___________________________
________ - 1 X2/X1 X2/X1 Where x
intended value X actual value in fabricated
chip.
4
Example Two Rs for x 10kW Actual
fabricated Rs X 12.47kW and 12.34kW
Then, Intended x2/x1 10/10
1 Actual X2/X1 12.34/12.47
0.99 Mismatch d (1 0.99) / 0.99 1
5

• IF you take many pairs of Rs (or Cs), and
  measure the mismatch, the mismatch will
  show a distribution.
• Ideally 50-100 devices drawn from random
  locations, at least 10 wafers, from at
  least 3 wafer lots.

6

• IF you take many pairs of Rs (or Cs), and
  measure the mismatch, the mismatch will
  show a distribution.
• Ideally 50-100 devices drawn from random
  locations, at least 10 wafers, from at
  least 3 wafer lots.

7

• Average mismatch
• indicates the bias or the systematic mismatch
  affects all samples.
• md ( d1 d2 d3 dN ) / N

8

• Standard deviation of the mismatch
  indicates random mismatch
• sd sum( di md )2 / (N-1) 1/2

9
Example systematic mismatch Rc contact
resistance 50W per contact Try to match 2kW
and 4kW resistors. ? If two contacts on each
strips 2kW has 5 100/2000 deviation 4 kW has
2.5 100/4000 deviation. ? Break 4kW into two
2kW segments with two contacts on each segment.
Then, 4kW with two 2kW segments has 4 contatcs
4x50W/4000W 5.
10

• Worst-case mismatch estimation
• 1. 3-sigma mismatch md 3 sd ?
  less than 1 of all Rs have a greater
  mismatch.
• 2. 6-sigma mismatch md 6 sd ?
  virtually no units have a larger mismatch
  than 6sd

11
Example worst-case md -0.5 sd 0.1 3-s
mismatch -0.5 3 0.1 0.8 6-s
mismatch -0.5 6 0.1 1.1
12

• 7.1 CAUSES OF MISMATCH
• Systematic Mismatch process biases, contact
  resistances,
  stresses, temperature gradients,
• Random Mismatch fluctuations in dimensions,
  doping, oxide
  thickness,

13

• (1) Statistical Random Fluctuations
• Consider matching two Capacitors
• Sigma of C mismatch
• sC ( ka kp/C1/2 ) / C1/2
• Where
• ka constant related to Area fluctuation
• kp due to peripheral fluctuation

14

• Area fluctuation dominates as C increases.
• IF C doubles ? mismatch down by 30 ? Area
  dominates
• Matching different values ? smaller C
  dominates, match 5pF and 50pF ? 5pF
  dominates

15

• Match two Rs
• Sigma of random mismatch
• sR (ka kp/W)1/2 / W R1/2
• Where W width of R
• ka due to area fluctuation
• kp due to periphery fluctuation

16

• For certain degree of matching, a pair
  with intended value R1, required W1.
• For the same degree of matching, a pair with
  intended value R2 is then chosen to have the
  W2
• Choose the larger of the following two
• (i) W2 W1 (R1/R2)1/2 area fluc. dominant
• (ii) W2 W1 (R1/R2)1/3 periphery fluc.
  dominant

17

• QUESTION A pair of 6 mm-wide 10kW resistors
  are to have worst-case mismatch of
  0.1. What width is required to obtain
  the same degree of matching between two
  100kW resistors ?

18

• QUESTION A pair of 6 mm-wide 10kW resistors
  are to have worst-case mismatch of
  0.1. What width is required to obtain
  the same degree of matching between 100kW
  resistors ?
• ANSWER The above equations give minimum widths
  of 1.90mm and 2.78mm. ? 2.78mm.
  Choose 3mm wide 100kW
  resistors.

19
(2) Process Biases (Systematic Mismatch) Drawn
Geometry does not get fabricated exactly.
20

• Example Poly Resistor with Wd 2mm and 4mm.
  Process bias 0.1mm. ?
• x1/x2 2/4 0.5.
• X1/X2 (20.1)/(40.1) 0.512
• Systematic mismatch (0.512 0.5)/0.5 2.4

21

• Example Poly resistor with Ld 20mm and 40mm.
  Process bias 0.2mm ?
• Single strip for 40mm
• X1/X2 (20 0.2)/(40 0.2) 0.503
• Systematic mismatch 0.5
• Two equal 20mm strips for 40mm
• X1/X2 (200.2)/2(200.2) 0.5
• Systematic mismatch 0

22
Example Process bias in Capacitors
Suppose an etch bias 0.1um. What is the
systematic mismatch between 10um x 10um
capacitor and 10um x 20um capacitor ?
Answer) Actual area A110.1 x 10.1 102.1
um2 A2 10.120.1 203.01 um2 A1/A2
0.5029 intended a1/a2 100/200 0.5
systematic mismatch due to process bias
(0.5029-0.5)/0.5 0.6
23

• Matching two different size capacitors for
  the same Area-to-Periphery ratio
• For the larger capacitor C2
• L2 C2/C1 1 (1-C1/C2)1/2
• W2 C2/C1 1 (1-C1/C2)1/2

24

• Matching two different size capacitors
• For the larger capacitor C2
• L2 C2/C1 1 (1-C1/C2)1/2 L1
• W2 C2/C1 1 (1-C1/C2)1/2 W1
• For smaller C ? a square

25

• OTHER SYSTEMATIC MISMATCHES
• PATTERN SHIFT
• ETCH VARIATIONS
• DIFFUSION INTERACTIONS
• MECHANICAL STRESSES
• THERMAL GRADIENTS
• THERMOELECTRICS
• VOLTAGE MODULATION
• CHARGE SPREADING, AND
• DIELECTRIC POLARIZATION

26

• (3) PATTERN SHIFT
• For example, NBL affects the p-epi layer and the
  surface discontinuities at p-epi/substrate
  interface propagates to the p-epi surface
  but often is displaced. ? pattern shift
• Pattern shift, pattern distortion, and pattern
  washout.

27

• (3) PATTERN SHIFT
• For example, NBL affects the p-epi layer and the
  surface discontinuities at p-epi/substrate
  interface propagates to the p-epi surface
  but often is displaced. ? pattern shift
• Pattern shift, pattern distortion, and pattern
  washout.

28

• (111) wafers have severe pattern shift and
  distortion
• (100) wafers have distortion and no shift ?
  tilted (100) surface minimizes the distortion.

29

• The pattern shift can affect matching of devices
  IF the pattern intersects one of the devices
  to be matched.