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HiPEAC HighPerformance Embedded Architectures and Compilers IST 004408

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Title: HiPEAC HighPerformance Embedded Architectures and Compilers IST 004408


1
HiPEACHigh-Performance Embedded Architectures
and Compilers IST 004408
Network of Excellence
  • HiPEAC pre-Review
  • LAquila, 29 July 2005

2
Introduction
3
Agenda
  • 930-Introduction (Mateo Valero/Manolis
    Katevenis)
  • HiPEAC general goals
  • HiPEAC WP structure
  • Overview of HiPEAC Objectives per WP and
    Indicators
  • 945-Tasks accomplished per WP
  • WP1 Integration
  • Website (Olivier Temam)
  • Research clusters (Olivier Temam)
  • Common computing equipment (Manolis Katevenis)
  • HiPEAC staff (Olivier Temam)
  • Roadmap (Stamatis Vassiliadis/Olivier Temam)
  • WP2 Common platforms
  • Simulation platform (Olivier Temam)
  • Compilation platform (Mike OBoyle)
  • WP3 Joint research
  • Cluster results (Olivier Temam)
  • New projects (FET, IST) (Mike OBoyle)
  • NSF-EU collaboration (Nacho Navarro)

4
Agenda
  • WP4 Spreading excellence
  • HiPEAC conference (Nacho Navarro)
  • Journal (Per Stenström)
  • Newsletter (Koen De Bosschere)
  • Summer school (Koen De Bosschere)
  • WP5 Management of consortium activities (Mateo
    Valero/Manolis Katevenis)
  • Structure and communications, meetings
  • Members and new members
  • Budget spent
  • 1125- Milestones Deliverables (Mateo
    Valero/Manolis Katevenis)
  • Milestones reached
  • Tasks postponed
  • Tasks delivered
  • 1145- Break
  • 1200- Questions and answers
  • 1245- Lunch
  • 1800- Presentation of reviewers conclusions and
    discussion with the consortium

5
HiPEAC Goal
  • To create a virtual centre of excellence in
    high-performance compilers and architectures for
    embedded processors in order to conduct the
    necessary research efforts to meet the high and
    increasing demand for computing power in all
    embedded applications

6
HiPEAC Objectives
  • Objective 1 to create a visible and integrated
    community of researchers capable of influencing
    the domain in the coming years
  • Objective 2 to identify, raise awareness and
    steer academic research efforts to
    industry-relevant scientific issues and establish
    tight relationships with European industry
  • Objective 3 to stimulate cooperation between
    researchers from architecture and compiler
    domains

7
HiPEAC structure
8
Objectives WP1 Integration
9
Objectives WP2 WP3 Jointly executed research
activities
10
Objectives WP4 Spreading excellence
11
WP1 - Integration
12
Web Site
13
Web Site
  • Intranet Extranet
  • Most emphasis on intranet services
  • Progressively opening extranet services
  • Ad-Hoc php programming
  • ? Drupal CMS (Content Management System),
    http//www.drupal.org

14
What We Already Have
  • Intranet
  • Clusters submission evaluation
  • Collaborative tools (wiki, SVN)
  • Extranet
  • Summer School
  • Conference
  • Announcements (jobs, PhDs, conferences,)
  • Newsletter
  • On-Line video seminars

15
What We Are Working On
  • Intranet
  • Statistics (monitoring hits, pages, hostnames,)
  • Collaboration tools (remote meetings,)
  • Funding distribution
  • Opening services to PhDs
  • Clusters pages (remote collaborations,)
  • Extranet
  • Clusters pages (project, publications, etc)
  • PhD pages (thesis, internships,)

16
Research Clusters
17
Research ClustersOutline
  • What is it ?
  • What is it for ?
  • Who is it for
  • A few guiding principles
  • How does it work ?
  • The first 9 months
  • What we did right/wrong

18
What Is It ?
  • A group of researchers working on the same topic
  • exploring collaboration
  • active collaboration
  • common interest but no collaboration
  • 59 of total budget (2,340,000)
  • Seed funding
  • Identification and Specialization of Frequent
    Patterns of Computations in Programs
  • Partners
  • Univ. Cyprus
  • ARM
  • Philips
  • INRIA
  • Univ. Paris 6
  • TU Delft
  • 4000
  • Collaboration
  • Co-exploration of embedded processor
    architectures and program transformations
  • Partners
  • RWTH Aachen, Germany
  • Univ. Edinburgh, UK
  • 10,500 for travel

19
What Is It For ?
  • Naturally, its all about networking
  • Foster strong individual ties
  • Help promising/new EU research groups
  • It can fund
  • Trips (EU beyond)
  • Short long stays
  • Internships
  • Fellowships (few)
  • Other (propose) ?

20
Who Is It For ?
  • Whether you are
  • Faculty
  • PhDs (can submit proposals themselves) !
  • Industry
  • Potentially, anyone in Europe
  • Collaborations with non-European researchers
  • Can only fund european side of collaboration
  • Beyond partners
  • System Level Performance/Power Evaluation of
    Stream Processing Embedded Systems
  • Univ. Amsterdam
  • Koc Univ., Istanbul
  • Industry
  • Philips in 2 projects
  • Infineon in 1 project
  • ARM in 1 project

21
A Few Guiding Principles
  • Tradeoff between flexibility focus
  • Let researchers self-organize
  • Stimulate research on a few key topics
  • HiPEAC topics
  • roadmap
  • Minimize administrative hassle

?
?
?
(Roadmap)
Funded projects
22
How Does It Work ?
Call (web site)
  • Call every month or so
  • 1 page, total funding, participants, andthats
    it
  • Selection by Steering Committee
  • Funding may be adjusted
  • Funding distribution published on web site
  • Clusters meeting (hub)
  • 1st in May 2005
  • You are in the 2nd one
  • 3rd in September (to be confirmed)
  • 4th in November (together with HiPEAC conference)

½ page proposal
Meeting
23
The First 9 Months
  • 3 Calls
  • 37 Clusters
  • December 2004
  • 21 clusters
  • 253250
  • March 2005
  • 3 clusters
  • 18240
  • June 2005
  • 13 clusters
  • 118600
  • Cluster funding
  • Available per year 573000
  • Spent 390090 (fellowship 122.900)
  • Cluster types
  • Collaboration 17 clusters, 240450
  • Seed 11 clusters, 69300
  • Conference 6 clusters, 10390
  • Extensions 3 clusters, 34500

24
The First 9 Months
  • Research topics
  • Single-Core microarchitecture 7
  • Adaptive Prediction Techniques for branching,
    prefetching, and coherence 
  • Multi-Core/Multithread 7
  •  CMPs-based  network  and  storage  I/O 
    subsystems  
  • FPGA/Specialization 5
  •  Automatic synthesis of Application Specific
    Instruction-set Processors 
  • Compiler or hybrid 6
  •  Adaptive Optimisation 
  • System 9
  • Scalable  System  Architectures 
  • Power 5
  •  Process Migration in Multi-Core Processors and
    its application to the Power Density Problem 
  • Tools 4
  •  GCC research platform cluster
  • Other 2
  •  Embedded system miniaturization and power
    autonomy 

25
Funded Clusters
26
Cluster Distribution (collaborations)
Israël
Cyprus
27
Cluster Distribution (funding)
Israël
Cyprus
28
Topic Distribution
Cluster
29
What Did We Do
  • Right
  • Lightweight/Flexible process
  • Getting people to participate
  • Let people self-organize
  • Clusters meeting (hub)
  • Wrong
  • Call frequency
  • Industry/Roadmap not involved in cluster
    selection
  • Not enough fellowships

30
Common Computing Equipment
31
Questionnaire
  • To understand common computing equipment needs
    and sharing possibilities, we have conducted a
    survey among HiPEAC partners
  • Summary of results
  • Operating systems used
  • All partners use Linux (various versions).
  • Software tools used in research (simulators, CAD
    tools, etc.)
  • Custom-built simulators for (i) switch
    simulation, (ii) system level simulation
  • SimpleScalar, Atom, Diota, R, SystemC, Xilinx ISE
  • Altera Quartus, Europractice CAD tools
  • Average execution time
  • Category-1 lt 0.5 days
  • Category-2 0.5-2 days
  • Category-3 gt 2 days
  • Vast majority of jobs seem to be in categories
    1,2
  • Number of jobs per set
  • Category-A 1-10
  • Category-B 10-100

32
  • Platforms used for running simulations
  • Two indicative platforms used currently by
    project partners are
  • 48 x Dual AMD (Athlon MP, Opteron 242), 1GBy
    memory, 100 GBytes local disk, 400 GBytes shared
  • 10 x DELL GX270, 2.8 GHz Pentium CPU, 2 GBytes
    memory, 80 GBytes local disk, 600 GBytes shared
  • Other platforms have similar characteristics and
    sizes
  • Most important platform feature
  • There exist jobs for which Memory is most
    important
  • There exist jobs for which CPU is most important
  • Tools used to submit jobs
  • Custom shell/perl scripts
  • OpenPBS (Open Portable Batch System)
  • Condor
  • Possibility of sharing equipment
  • There is willingness to share equipment
  • However, currently systems seem to be
    overutilized
  • Next step
  • Examine ways that would work best for scaling the
    underlying platforms to sizes capable of
    supporting future needs
  • Should this happen by each partner separately or
    collectively in a distributed infrastructure

33
Milestones
34
HiPEAC Staff
35
HiPEAC Staff
  • Support staff
  • Pilar Armas
  • Financial issues
  • Legal issues
  • Assistant of coordinator
  • Michiel Ronsse, Kurt De Cock
  • Technical support for multiple activities
    (conference, summer school, meetings,)
  • Web site
  • Soon computing platform, remote collaboration
    tools,
  • Still missing support staff for day-to-day
    operations
  • Research staff (clusters)
  • 1 Postdoc grant
  • 5 partial or full PhD grants

36
Roadmap
37
Roadmap
  • Panel
  • Steering Committee
  • (provisional list)
  • G. SohiW.-M. HwuD. BurgerM. FlynnY. PattA.
    AgarwalA. DehonS. BorkarN. McKeownB. DallyG.
    SlavenburgI. Bossen
  • Covers key HiPEAC topics
  • High-Performance embedded cores
  • Compiler optimizations
  • Tools (simulators compilers)
  • Technology
  • Market prospective
  • Time span 2005 2011
  • First panel meeting planned for September 2005
  • First draft planned for December 2005

38
WP2 Common Platforms
39
Simulation Platform
40
General Meeting PACT 2004
  • Orientation
  • Standardization
  • Modularity
  • Capabilities
  • Workgroup
  • Chalmers, SE
  • Uppsala, SE
  • INRIA, FR
  • Univ. Amsterdam, NL
  • (Virtutech, SE)
  • Ghent Univ., BE
  • Princeton Univ., US
  • First workgroup meeting (PACT 2004)
  • Propose a EUUS standard for maximizing adoption
    probability
  • INRIA Princeton investigate platform baseline

Module 1
Power
Sampling

Module 2
Power
Sampling

Module 3
Power
Sampling

41
INRIA Princeton Interactions
  • Modular platform ?
  • Differences characteristics
  • Communication protocol (3 links)
  • Models of computations (MoC)
  • Interpretation vs. compilation
  • Syntax
  • Integration
  • Selection ?
  • Integration ?
  • BUT we shouldnt expect most groups/companies
  • to give up on its environment
  • to do a lot of work to achieve compatibility
  • to give up on confidentiality requirements

MicroLib
Liberty
MicroLib
Liberty
MicroLib
Liberty engine
Liberty
MicroLib
MicroLib engine
Liberty
42
Workgroup meeting April 2005
  • First agreement on joint approach
  • Meta-environment
  • Keep existing environments
  • Wrap modules
  • Enables interoperability
  • Standardization of
  • Module interface specification
  • Module capabilities specification
  • Module interface specification
  • Input/Output signals
  • Dependencies among signals
  • Model of computation
  • Implementation
  • LSS, a subset of Liberty environment, has many of
    the features needed
  • Wrapper development one-time cost

43
Wrappers (SystemC, LSE, )
Web Site
Visualizer
Machine Description (lfsr.lss)
Machine Desc. Interpreter (stage 1)
Integrator Analysis/Opti (stage 2)
netlist of instances
Simulator
Module Library
Leaf Module (xor.h)
Hierarchical Module Descriptions
Leaf Module Interface Description (systemc_xor.lss
)
Leaf Module (flop.clm)
Leaf Module Interface Description (lse_flop.lss)
Other Modules (C, object/exe, )
Other Interface Descriptions
44
Status Next Steps
  • What we already have
  • Initial interface language (wrappers
    integrator) candidate derived from LSS
  • Adaptors for SystemC, MicroLib, Liberty, Function
    calls, Object code (others possible)
  • Hooks for implementing capabilities
  • Prototype of environment
  • Course at 1st HiPEAC summer school on platform
    (50 participants)
  • What we need to do
  • Create hybrid models
  • Stress testing
  • Demonstration purposes
  • Collaboration with company environment
  • Enhance simulation performance
  • integrator for direct MoC conversions
  • distributed simulation support
  • Web site (library, tutorials, documents, etc)
  • Give this thing a name (Europe-US alliance)
  • Hiring platform staff (who, PhD/Engineer, where)
  • Integration w/ other HiPEAC simulation activities
  • Platform staff tasks
  • Build maintain environment
  • Build web site
  • Build interface modules
  • Build/Adapt key simulator(s) compatible with
    interface (which environment ?)
  • Build/Help with capabilities tools

45
Compiler Platform
46
Background
  • Compiler research is frequently impeded by lack
    of suitable infrastructure
  • Infrastructure development is an extremely costly
    investment which may be quickly redundant
  • Large number of infrastructures with different
    pros and cons
  • Research ideas are redundantly implemented in
    several compilers

47
Background
  • No exchange of modules possible between
    infrastructures
  • Algorithm formulation is tightly bound to the IR
  • Aim to gather European implementation work
    around a small core of infrastructures
  • Allow exchange of work throughout network
  • Speed up the prototyping of research ideas

48
Common Platform
  • Common platform projects have proved untenable in
    the past
  • Large person-months required makes this very
    expensive
  • Not possible with entire budget of HiPEAC!
  • Instead look for commonality and best practice to
    coordinated efforts
  • Supported by small amount of engineer effort (18
    months)

49
Progress
  • Discussions started with kick-off meeting at PACT
    2004
  • Interested members contributed to a document
    cataloguing compilers in use
  • Contains evaluations based on experience
  • Draft produced early 2005 used as a basis for
    research cluster meeting in Spring 2005

50
Progress
  • 3 potential platforms identified at meeting
  • 2 research clusters to investigate followed on
    from this discussion gcc and Cosy
  • Both have been funded by HiPEAC and will aid the
    evaluation process
  • Deliverables D2.c and D2.d and associated
    milestones slightly ahead of schedule

51
WP3 Joint Research
52
Research Clusters
53
New Projects (FET, IST)
54
Related Projects
  • SCALA FET integrated project
  • Likely to enter negotiation stage
  • 8.5 MEuros HiPEAC members
  • Coordinator Stamatis Vassiladis
  • Interconnected multi-core chips
  • Architecture, network, compiler, runtime,
    language, applications
  • InSyst complementary NoE
  • Unsuccessful good reviews
  • Embedded call
  • one IP several STREPs under discussion

55
Collaborations (NSF-IST)
56
NSF-IST Collaboration
  • First call for collaboration June 2004
  • Two HiPEAC collaborations were approved
  • University of Patras Princeton University
  • Margaret Martonosi, Princeton University, USA
  • Stefanos Kaxiras, Univ. of Patras, Greece
  • U. Politecnica Catalunya / FORTH Rutgers
    University
  • Liviu Iftode, Rutgers University, USA
  • Angelos Bilas, Univ. of Crete and FORTH, Greece
  • Nacho Navarro, UPC, Spain
  • Transatlantic Research Agenda on Future
    Challenges in Embedded Systems Design, IST - NSF
    Workshop, July 8th, 2005 (Paris)

57
Princeton/Patras
  • Princeton
  • NDP Network Driven Processor. CMP architecture
    where an intelligent Network orchestrates
    execution (scheduling of threads, communication,
    thread-mapping, etc). Network provides
    generality, high-performance.
  • Patras
  • Scalable Architectures SiSCAPE. CMP
    architectures. Communication via shared memory.
    Targeted towards embedded, low-power, low-cost,
    specific (not G.P.) applications. Lack of super
    interconnection network low-power, low-cost,
    easier to make (reliability )
  • Collaboration
  • Porting of embedded, media and streaming apps to
    NDP
  • One Princeton University student from NDP Project
    has been during 3 months in Patras

58
Rutgers/UPC/FORTH
  • Rutgers
  • Indoor-outdoor cooperative computing
  • Spatial Programming with bounded timers
  • Smart Messages (self-routing, consistency)
  • UPC/FORTH
  • Embedded High Performance Computer Architecture
    and Compilers
  • Runtime customization for embedded systems
  • Energy analysis at system/application level
  • Dynamic runtime for wireless sensor networks
  • Collaboration
  • Distributed computing for networks of embedded
    systems
  • One student from UPC to Rutgers during this fall
    from Rutgers to UPC/FORTH in Spring/Summer 2006

59
Princeton/Patras Experiences
  • Student exchange is a great way to advance
    collaborative efforts
  • Students get involved in other local activities
    besides main collaboration effort
  • Students research horizons are expanded
  • Seeds for future collaborations
  • Significant contributions in both ways
  • Joint papers in a larger context
  • Reinforces relationship between primary
    researchers

60
Rutgers/HiPEAC Experiences
  • The most important thing is to work on topics of
    common interest
  • Collaboration is something from which we can
    learn a lot, and for this reason there is merit
    into making the effort
  • But it is also a matter of bridging expectations
    from partners
  • Good opportunity to agree on state of the art
    compatible infrastructure, for example
  • Although faculty had been already in contact
  • this formal support from USA/EU institutions is
    very useful to set the bases for common projects

61
WP4 Spreading Excellence
62
Conference
63
HiPEAC 2005 Conference
  • International Conference on High Performance
    Embedded Architectures Compilers
  • Barcelona, Spain, 17-18 November 2005
  • Right after MICRO conference, same facilities
  • Extra funding requested to local institutions
  • International participation in the organization
    Co-Chairs, Steering Committee, Program Committee
    (50 USA-EU)
  • Keynotes
  • Markus Levy (EEMBC)
  • HiPEAC member

64
HiPEAC 2005 Conference
  • Submitted papers 84 (June 17th)
  • Papers review process
  • Reviewers 97
  • Reviewers per paper 3 from PC at least one
    external reviewer
  • Number of reviews 336
  • PC Meeting in Rome (July 24th)
  • Accepted papers 18
  • The proceedings will be published in Lecture
    Notes in Computer Science (LNCS)
  • Best papers will be selected for HiPEAC Journal

65
Journal
66
Objectives
  • Create the first international journal covering
    topics in the research area targeted by HIPEAC
  • Attractive for top researchers by promoting the
    highest quality measured eventually by impact
    factors
  • Led by an editorial board of internationally
    well-respected researchers in the field
  • Top quality publisher

67
Editorial board
  • Editor-in-chief Per Stenstrom, Chalmers
  • Editorial board
  • Non-European members will be recruited as soon as
    negotiations with the publisher are concluded

68
Transactions on HIPEAC
  • Negotiation underway with Springer Verlag
  • Fast dissemination through online repository
  • Printed version distributed yearly to subscribers
    (individual as well as institutional)
  • Indexed by ISI and impact factor assigned
    regularly
  • First issue devoted to top papers in the first
    edition of HIPEAC conference proceedings.
  • Target date for first issue January 2006

69
Newsletter
70
HiPEACinfo
  • Quarterly newsletter
  • 850 copies
  • Layouted, printed and mailed by Wallace Sanders
  • Items
  • Messages from the coordinator and from the
    project officer
  • Steering committee news
  • Report on activities
  • Presentation of a partner country
  • PhD news
  • Upcoming events
  • In the spotlights

71
Summer School
72
ACACES 2005
  • First International Summer School on Advanced
    Computer Architecture and Compilation for
    Embedded Systems

73
Steering Committee
  • Mike OBoyle, University of Edinburgh
  • Josep Llosa, UPC Barcelona
  • Antonio Prete, University of Pisa
  • Olivier Temam, INRIA Futurs Orsay
  • Theo Ungerer, University of Augsburg
  • Mateo Valero, UPC Barcelona
  • Koen De Bosschere, Ghent University

74
Lecturers
75
Course enrolment
76
Country distribution
184 participants from 21 countries
77
Further statistics
  • Summer school applications 212
  • Registrations 184
  • 123 from HiPEAC member institutions
  • 21 countries
  • 9 companies (22 participants)
  • 14 teachers/invited speakers
  • 4 observers
  • 1 staff member Michiel Ronsse

78
Activities
  • Opening ceremony and keynote by Maurice Wilkes
  • 12 courses in 3 parallel tracks
  • Invited talk on the Cell processor by Jim Kahle,
    chief architect for the Cell
  • Poster session (77 posters)
  • Excursion to Villa dEste
  • HiPEAC presentation
  • Farewell dinner

79
Budget
  • About 200 000 euro
  • Direct contribution by HiPEAC 103 000 euro
    (grants, teachers, staff,)
  • 112 HiPEAC grant requests
  • 45 grants were available
  • Increased to 70 on SC of May 11

80
WP5 - Management of consortium activities
  • Structure
  • Members
  • Budget

81
HiPEAC structure
82
HiPEAC communications
  • Steering Committee
  • 9 academic institutions
  • meets at least twice a year and by conference
    call
  • Juan les Pins, September 2004
  • Barcelona, December 2004
  • Brussels, January, February 2005
  • Gent, May 2005
  • General Assembly
  • partners and rest of members
  • meets at least once a year
  • Juan les Pins, September 2004
  • Industrial Advisory Board
  • HiPEAC industry members
  • WP specific meetings
  • Juan les Pins, September 2004WP2/simulation
    meeting
  • Paris, April 2005 WP2/simulation meeting
  • Ghent, May 2005 WP2/compilation meeting

83
HiPEAC participants
  • Setting up the HiPEAC community
  • Beyond HiPEAC partners Research clusters. Open
    to researchers working on HiPEAC topics
  • Gent, May 2005 1st Research clusters meeting
  • Summer school, July 2005
  • Conference, November 2005

84
HiPEAC partners and members
85
HiPEAC partners and members
86
HiPEAC partners and members
15 HiPEAC contractors 77 HiPEAC person members
coming from 27 HiPEAC member institutions
87
Budget (i)
  • Who participates?
  • Funding is not a priori distributed
  • Funding is distributed through calls for
    collaborations
  • Calls open to all HiPEAC members
  • Members have rights duties
  • The right to benefit from the network funding and
    activities
  • The duty to actively participate to network
    activities and help promote the network

88
Budget (ii)
89
Budget ( iii)
  • Research clusters top conferences

90
Milestones and Deliverables
91
Milestones (i)
92
Milestones ( ii)
93
Deliverables
94
Thank you !
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