Detector R

1
Detector RD Summary

• Walter F.J. Müller, GSI, Darmstadt
• 6th CBM Collaboration MeetingPiaski, September
  7-10, 2005

2
MIMOSA11 _at_ 1MRad (First results from Frankfurt)
MIMOSA11 before and after 1MRad X-rays (_at_ 10C,
Treadout700µs)
Standard pixel (A0 Sub 2)
Hardened pixel (A0 Sub 1)
Signal remains stable
Signal drops
Shoulder dissapears
Entries (normalized)
4 pix.
4 pix.
Minor degen- eration.
Entries (normalized)
! Preliminary results and conclusions !
Small peak dissapears
Signal remains stable
Minor degen- eration.
1 pix.
Entries (normalized)
Entries (normalized)
1 pix.
300
300
Charge collected ADC
Charge collected ADC
Optimal conditions (-25C, Treadout 170µs) 15
more noise (11 e- )gt Chip ok
From M. Deveaux
3
Fast readout speed, the inner layers
Standard approach for MAPS
Offline Cluster finding
External 12-bit ADC
MIMOSA
Output
The design concept for CBM
On - chip cluster-finding processor
1000 on - chip ADCs and/or discriminators
Sensor array (100 pixels/line)
Output Cluster information (zero surpressed)
3mm
2mm
Goal A readout time of ? 10µs for the CBM
From M. Deveaux
4
Vertex Detector

• MAPS
• Significant progress in the radiation hardness
  front
• Still much too do, further tests planned
• demonstrate limit under best operating conditions
• more tests with neutrons
• Fast column-based readout
• in work since a while
• building blocks studied
• chip planned for late next year
• DEPFET
• interesting alternative 100 um thickness...
  puts ?c in reach
• concept for fast readout to be worked out
• in an early stage...

5
Silicon Strip Detector Stations
Prosal Four tracking detector stations, built
from a few types of silicon strip wafers.
Sectorized segmentation Basic sensor elements
200 ?m thick silicon
wafers. double-sided, rad-tolerant. 25 ?m strip
pitch. Inner 6x4 cm Middle 6x12
cm Outer 6X20 cm

• Open questions
• strip length, stereo angle(to reduce fake hits)
• location of read-out(on sensor, all at edge ?)

From J. Heuser
6
Silicon Strip

• 3 RD contracts for Sensor, FEE, and layout now
  active
• Many loose ends
• module layout
• how to arrange and connect sensors into a ladder
  and to read-out ?
• can the read-out be put on the perimeter ?
• requirements on sensor and read-out
• optimal sensor thickness
• radiation hardness for read-out

7
STS technological options
RD in progress (talk by Michael Deveaux) IReS,
(GSI, JWGU)
From J. Stroth
8
Technology development for the PMT FEU-Hive,
August 2005
Vladimir Rykalin

• Technology for the high frequency welding of the
  covar ring electrodes with the glass tubes has
  been installed
• Technology of the Sm evaporation on the PMT
  window has been tested
• Technology of bialkaline photocathode activation
  has been tested
• The first distributed dinodes have been
  evaporated, but not still be tested

From S. Sadovsky
9
RICH

• GSI-IHEP RD contract for PMT development now
  active
• Next steps
• study and test mirror alternatives (Be, glas,
  Carbon)
• Is N radiator feasible ?
• Are all properties known ?
• Do we need measurements, or simulations ?
• Design issues
• mirror support ? look at existing setups
• beam pipe ? look at the whole system

10
TRD
From C. Garabatos
11
A preliminary TOF system layout

• Most central part highest rate and occupancy
• Small single cells
• Intermediate part high occupancy and large area
• Single strip shielded RPCs
• External part largest area
• Multistrip (differential) counters
• The uniformity of the response over the full
  detector surface is a key element for the physics
  performance

From E. Cordier
12
RPC

• Key issues
• Rate
• new low resistivity glasses (ceramic, Glaverbel)
• high T operation
• Aging
• tested to 600 mC/cm2
• much to be learned from HADES/FOPI RPC projects

13
ECAL

• Prototype being build (Y. Kharlov)
• 20 X0 0.275 mm Pb1.5 mm Sci Target
  3/sqrt(E)
• tests on U70 in fall 2005 and 2006
• Much emphasis on MC and optimization of layout
  (I. Korolko)
• improving e/pi
• handling hit density
• To be resolved
• What is the prime mission of ECAL ?
• help in e/pi
• look for direct photons
• What is the required solid angle coverage to
  achieve physics goal

14
A CBM M-MPW Run

• CBM organized a Multi-Multi Project Wafer run in
  UMC 0.18 µm CMOS
• 6 different parts combined on a 5 x 5 mm2 wafer
• submitted June to Europractice (IMEC)
• dies (already cut) just delivered, now come the
  moments of truth

Test structures
Coordination Marcus Dorn _at_ KIP
PreAmp for Si Strip
Content addressablememory
DLL based TDC
12bit 50MSPS ADC
Clock-Data recovery
From W.F.J. Müller
15
CBM FEE/DAQ Demonstrator

• Mission Provide a platform to
• demonstrate essential architecture elements of
  the CBM FEE-DAQ concept
• FEE self-triggered, data push, conditional RoI
  based readout
• CNet combined data, time, control, and RoI
  traffic
• TNet low jitter clock and synchronization over
  serial links
• BNet high bandwidth, RDMA based architecture
• E/DCS integrated approach for DCS/ECS
• provide test bed for all future FEE/DAQ
  prototyping in
• hardware
• firmware
• controlware
• software
• perform beam tests with detector prototypes
• form basis for medium-scale applications in
  intermediate-term experiments
• Be operational by end 2006
• avoid cathedrals, go for the bazaar, try and
  learn

From W.F.J. Müller