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Chipcon 802'15'4 Transceiver

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FIFOP Goes high when # bytes received exceeds set threshold. ... CC2420 is constantly receiving and saving data into RX FIFO as long as it's not transmitting. ... – PowerPoint PPT presentation

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Title: Chipcon 802'15'4 Transceiver


1
Chipcon 802.15.4 Transceiver
  • EECS150 Fall 2006
  • Lab Lecture 8
  • Leo Chen

2
Project Overview
  • N64 Controller
  • User input to your game.
  • Video
  • Game output to the user.
  • Chipcon Transceiver the FUN Two-Week One! )
  • Bidirectional communication between games.
  • Game Engine
  • Drives game play. Glue logic. Handles
    communication handshaking.

3
Transceiver Overview (1)
  • 3rd party chip mounted on expansion board.
  • Uses a PCB antenna. Take a look!
  • IEEE 802.15.4 standard support. Zigbee ready.
  • Transmits on unlicensed 2.4 GHz spectrum. 16
    communication channels.
  • Overlaps with Wi-Fi.
  • 250 kbps maximum data rate.
  • We will only be using a very small percentage of
    this.
  • Configure, send, receive, and issue commands to
    chip over SPI to CC2420 registers.

4
Transceiver Overview (2)
  • 33 configuration registers.
  • We change 3 of them.
  • 15 command strobe registers.
  • We issue 6 of them.
  • These change the state of the CC2420 internal
    FSM.
  • 128-byte RX FIFO 128-byte TX FIFO
  • Accessed via 2 additional registers.
  • Also accessible as RAM (i.e. by addressing).
    Only for debugging! Dont do this unless youre
    a masochist

5
CC2420 Inputs Outputs
  • Single bit status signals.
  • High level transceiver operation information.
  • Initialization signals.
  • Drive signals once and forget about it.
  • SPI interface.
  • Interface to rest of chip via CC2420 registers.
  • Send, receive, configuration, detailed status.

FPGA
VREG_EN RF_RESET_
6
Single Bit Status Indicators
  • FIFO Goes high when theres received data in RX
    FIFO.
  • FIFOP Goes high when bytes received exceeds
    set threshold.
  • CCA Indicates that the transmission medium
    (air) is clear. Only valid after 8 symbol
    periods in RX mode.
  • SFD Goes high after SFD is transmitted low
    after packet completely sent.

7
SPI Interface
  • Serial interface with 4 wires
  • SClk Clock signal you generate.
  • CS_ Active-low chip select.
  • SI Output to the CC2420.
  • SO Input from the CC2420.
  • Interface to the chip! Initialization,
    configuration, TX, RX, detailed status.
  • Luckily for you, its provided as a black box.

8
CC2420-specific SPI (1)First Byte
  • First byte always has above format.
  • Bit 7 Set to 0 for register access.
  • Bit 6 Read/write control.
  • Bits 50 Address of register. P. 60 of
    datasheet.
  • Followed by data specific to register being
    accessed.

9
CC2420-specific SPI (2)Writing to Configuration
Reg.
  • First byte followed by 2 bytes of configuration
    data.
  • Data on SO invalid here.
  • Transceiver replies when first byte is sent out
    with status byte.
  • True for all SPI accesses.
  • Not necessary to inspect, but can be helpful for
    debugging!

10
CC2420-specific SPI (3)Issuing Command Strobes
  • One byte only. Nothing follows.
  • Address sent indicates the command strobe being
    issued.
  • Note that 0x00 is NO OP. This is useful for
    explicitly retrieving status byte.

11
CC2420-specific SPI (4)Saving to TX FIFO
  • After first byte, send n bytes of data to
    transmit over wireless.
  • SPI session only ends when CS_ is pulled high.
  • CC2420 replies with a new status byte with each
    byte thats saved to FIFO.

12
CC2420-specific SPI (5)Receive from RX FIFO
  • After first byte, send a n bytes of dont care
    in order to receive data.
  • During first byte, CC2420 replies with status.
    Subsequent bytes are data saved in FIFO.
  • Must be careful not to request data from empty
    FIFO!
  • SPI session only ends when CS_ is pulled high.
  • Reading from a configuration register is the
    same.

13
Configuration Registers
14
Command Strobe Registers
15
TX/RX FIFO Registers
16
Initialization
17
Transmit
18
Transmit(2)
  • CC2420 needs 12 symbol periods to move into
    RX_SFD_SEARCH state after transmit done or SRXON.
  • 1 symbol period 16 us.
  • Without enforcing wait, aggressive user of your
    Transceiver module will cause CC2420 to never
    receive data from air.
  • Not that big of a problem for us ? demo game
    engine transmits once every 25ms.
  • You want to enforce wait, just in case you forget
    or make a mistake when doing CP4.

19
CCA
  • If you dont follow CCA we will dock MAJOR points
  • If CCA isnt high, you must wait a RANDOM AMOUNT
    OF TIME
  • CCA may also not go high if you have buffer
    overflow. FIFOP !FIFO

20
Receive (1)
21
Receive (2)
  • Packets are only received after CC2420 has spent
    12 symbol periods in receive mode.
  • There must be wait time between transmissions.
  • Allows the transceiver to look for and receive
    data.

22
Receive(3)
  • Refers to 2 things
  • CC2420 is constantly receiving and saving data
    into RX FIFO as long as its not transmitting.
    Look at CC2420 internal FSM on p. 43.
  • You have to receive data from RX FIFO, filter
    it, then save wanted data into SPIFifo.

23
Design Structure (1)
24
Design Structure (2)
  • Transceiver Highest level block. 32-bit
    input/output, channel changing, addressing.
  • SPI Abstraction Takes care of details of CC2420
    SPI interface. Arbitrates between TX/RX.
  • SPI (provided) Handles details of interface
    timing.
  • SPIFifo (provided) Storage place for filtered,
    received data.

25
Packet Format
  • On transmit, only fill TX FIFO starting with
    length byte.
  • Preamble SFD automatically appended.
  • Transmit all zeros for CRC. CC2420 will replace.

26
Channel Addresses
  • There are 16 channels.
  • Your group will be assigned a channel.
  • You must be able to change channels without
    reset!
  • Address are 8-bits wide ? 256 addresses. Zero is
    unused. 0xFF is reserved for broadcast.
  • Your group has been assigned 2 addresses.

27
Interference Debugging
  • Roughly 2-3 groups per channel. Each group in a
    particular lab has distinct channel.
  • Can also pick up data on neighboring channel.
  • Very first goal is robust channel changing during
    initialization.
  • Can pick up 802.11 packets sometimes.
  • Your module must recover gracefully.
  • Your project interferes with Wi-Fi vice versa.

28
HandshakingInRequest/Invalid
  • SPI uses a variation of this.
  • You may want to use this internally.

29
HandshakingReady/Start
  • Transceiver uses this interface for input
    output.

30
Debugging Tools
  • Chipscope!
  • We will be releasing some debugging utilities.
  • Packet sniffer.
  • Packet counter.

31
Get Started!
  • READ THE DATASHEET
  • TAs will not be babysitting this checkpoint
  • Obey our CCA rules
  • Be smart about this, its a 2 week lab for a
    reason.

32
GO PIKACHU GO!
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