CTIO Blanco WF Imager Data Acquisition

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CTIO BlancoWF ImagerData Acquisition

• Jon Thaler
• Fermilab, Dec. 6, 2003

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MONSOON Pixel Server
Focus onthis connection for a moment
MSL (MONSOON Supervisory Level
Nick Buchholz (12/1/03)
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Crude specs

• Assume
• 60 CCDs_at_ 2k?4.6k with 2 amps (E2V)
• 1 MHz pixel digitization and read rate
• ?Read time is 4.6 s per CCD.
• 2 bytes per pixel ?9 ?109 bits per image
• Exposure time gt 600 sec / 10 (0.5 TB/night)
  (Mohr/Annis)
• gt 120 parallel DAQ channels ? dead time below 8.
• gt Time average data rate (DHE?PAN) 1.2
  Mbps/chan ? 150 Mbps total.
• There is a mismatch between CCD readout and DHE
  ? PAN fiber rate requirements. Monsoon
  architecture issue?

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Quantity Item Cost (est.)
1 Chassis Backplane 5k
1 set Power Supplies 1.3k
2 1 MCB 3.9k
1 1 CBB 8k
8 1 IR Acquisition 73.8k
2 9 Transition Cards 1.6k
2 sets SL100 (DHE PAN) 10k
1 PAN PC 3k
Total 107k
NEWFIRMImplementation( Mark Huntens
presentation at12/1/03 Monsoon Status review)
Qty Board _at_Watts Total
2 MCB 7.5 15
1 CBB 8 8
1 CBB Transition 5 5
8 IR Acq 11.25 90
8 IR Acq Transition 3 24
1 Power supplies (75 eff.) 35
Total dissipated 177
Naïve ScalingCost 200k Power 300 W
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Space on the Telescope
NEWFIRM uses a standard 19 crate We will require
two, if this is the route we take. We need to
worry about space and power.
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Software

• Pixel Acquisition Node (PAN) SW resides in a PC.
• Detector Head Electronics (DHE) SW can either be
  implemented in a processor or as firmware
  (FPGA).
• Communications is via Systran fiber optics
  interfaces.
• PAN SW (at least for NEWFIRM) has been
  implemented by the Monsoon group.
• A DHE SW emulator for the PC has been written
  byNick Buchholz (partial implementation?).
• DHE SW is detector dependent, and wil be a major
  project.

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Pixel Acquisition Node (PAN) Layer

• No knowledge of other PAN-DHE pairs.
• Provides PPX interface to MSL or users.
• Provides run-time configuration of PAN/DHE.
• Provides first level data archiving.
• Provides multiple image processing modes.
• Fowler Sampling, coadds, MSR techniques, OT
  imaging.
• Provides parameter verification/control/help.
• Deals with IR/OUV/etc. differences.
• Handles single exposure sequencing.
• Handles raw data pre-processing.
• Provides interface to DHE hardware.
• Provides DHE sequencer configuration/download.
• Provides PAN error monitoring/reporting/recovery.
• Provides support for speed ROI.
• Provides support for compression ROIs.

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Detector Head Electronics (DHE) Layer

• Handles array hardware control.Voltage levels,
  sequencing, monitoring.
• Handles integration timing.
• Handles detector readout sequencing.
• Handles digital averaging.
• Handles shutter control.
• Can handle array temperature control.
• Board Self Identification and Version tracking.

Some of this is DAQ and some is front end.
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Near Term Plans

• Buy a pair of Systran PCI cards to study DHE/PAN
  communications. Fermilab should probably to the
  same,so we can coordinate.
• We must define boundaries and allocate
  responsibilities.
• Emulator verification.
• DHE controller specs? Awaits a sensor decision?
• Are Systran cards overkill? (e.g., they can do
  broadcast).How can cost be kept down?