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paper 3'6

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Loop filter provides anti-aliasing. Over-sampling reduces N of aliases. ADC. DAC. mfs ... 'low' over-sampling & aggressive noise-shaping (complex band-pass filter) ... – PowerPoint PPT presentation

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Title: paper 3'6


1
A 4.4mW, 76dB complex ?? ADC for Bluetooth
receivers
Kathleen Philips
Philips Research Laboratories, Eindhoven, The
Netherlands
2
Outline
  • A/D conversion for a low-cost receiver
  • Quadrature A/D conversion
  • Implementation issues
  • Measurements and conclusions

3
Low IF receiver
ADC
Digital processing
LNA
High degree of integration, digitization and low
power?
4
Low cost receiver for Bluetooth
I
LNA
Quadrature ADC

LO
90º
Q
LNA
  • NO analog filter !
  • NO variable gain !

5
Consequences for ADC
Lack of analog channel filtering and variable
gain
?
Input signal to ADC has
- high bandwidth - large dynamic range
6
Solutions
DAC
ADC
mfs
7
Quadrature A/D conversion
8
Complex band-pass SD
0.0
ideal
-45dB mismatch in feedback
? leakage from noise in image band
-40.0
output (dB)
-80.0
-120.0
-160.0
frequency (MHz)
-2.0
-1.0
0.0
1.0
2.0
9
Solution to leakage problem
0.0
-40.0
output (dB)
-80.0
-120.0
-160.0
frequency (MHz)
-2.0
-1.0
0.0
1.0
2.0
10
Outline
  • Introduction A/D conversion for a low-cost
    receiver
  • Quadrature A/D conversion
  • Implementation issues
  • Measurements and conclusions

11
5th order complex SD, 1bit _at_ 64MHz
12
Input stage
  • Large gm!
  • low input impedance lt400? over 80MHz BW

VDD
Vb1
Vb2
outP
outN
  • high linearity large gm reduces error
    voltage

Vb3
inP
inN
Vb4
fgtgt1MHz
(strong to weak inversion )
VSS
500 mA
13
Other stages (2 to 5) gm-C
VDD
Vb1
  • Scaled
  • Degenerated
  • Gate-oxide as integrator capacitor

Vb2
outP
outN
CINT
Vb5
inN
inP
Vb4
VSS
50 mA
14
Noise contributions
-20
Output (dB)
mfs
jitter
Rdac , jitter
-60
DAC
Rdac
1
-1
0
frequency (MHz)
15
Conclusions on implementation
  • Low power by
  • low over-sampling aggressive noise-shaping
    (complex band-pass filter)
  • time-continuous loop filter
  • minimal number of current branches
  • scale circuits according to noise contribution
  • Power is dominated by requirement on input
    impedance
  • Balanced power for ADC, clock generation and
    digital

16
bandgap
560mm
X-osc (tiled)
400mm
Quadrature ADC
17
Measured SINAD
75.5dB at 3dB
75.0
SINAD (dB)
65.0
DNR76dB
55.0
45.0
measured at 500kHz
-45.0
-25.0
-5.0
0
Input signal level (dB)
18
Measured two-tone intermodulation
IM3 lt -82dBc
f1, f2
2f1-f2
DC offset
Amplitude (dB)
2f2-f1
image
RBW640Hz
frequency (MHz)
19
Measured image rejection
input
IR gt 47dB
DC offset
Amplitude (dB)
image
RBW640Hz
frequency (MHz)
20
Performance with out-of-channel interferers
  • Allowed input level without increasing noise in
    wanted channel

3
Full scale
0
-3
output (dB)
-6
-9
-1
-10
10
1
frequency (MHz)
Bluetooth mask
21
Aliasing test
  • Interferer test with input at (mfs370kHz) at
    7dBFS

-40.0
Aliasing _at_-75dB
Bluetooth spec
7dB
Amplitude (dB)
-80.0
Due to generator
-120.0
-2.0
-1.0
0
1.0
2.0
frequency (MHz)
22
Measurement results summary
Input signal 0 1 MHz, 35 mArms Sampling
frequency (mfs) 64 MHz Dynamic range 76
dB SINAD 75.5 dB IM3-distortion lt -82
dBc Aliasing spurious lt -75 dB Power
consumption 4.4 mW (_at_1.8 V) Chip area 0.22 mm2
Technology 0.18 mm, 1PS, 5Me, CMOS
(differential, per channel)
23
Conclusions
  • Time-continuous, complex SD modulator features
  • excellent power-to-performance ratio
  • low impedance termination of RF circuits
  • robustness to out-of-channel interferers
    (high linearity filtering behavior)

? reduces/replaces channel filtering variable
gain
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