DNC, GEC

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DNC, GEC Non-linear interpolation

• A Review of
• A Digitally Enhanced 1.8V 15-bit 40-MSample/s
  CMOS Pipelined ADC1
• Background Digital Calibration Techniques for
  Pipelined ADCs2

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Pipelined ADC review

• Non-linearities in DAC levels cause harmonic
  distortion
• Common solution Try to randomly distribute
  non-linearities in DAC so energy is spread out in
  the frequency spectrum
• Interstage gain errors reduce SNDR/SNR
• Solution Apply correction gain digitally

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Detecting a known signal component in the output
of an unknown system
Mean of td 0

• Td with a mean of zero
• Periodic signal
• Pro Can have a small N since power of td is
  evenly distributed in time
• Con Delta function in the frequency domain
• White noise signal
• Pro Flat power density spectrum
• Con Need large N, ideally N8

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A Digitally Enhanced 1.8V 15-bit 40-MSample/s
CMOS Pipelined ADC
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Outline

• Dynamic Element Matching (DEM)
• DAC Noise Cancellation (DNC)
• Gain Error Correction (GEC)
• Bootstrapped Switches
• Timing

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Pipeline ADC from 1
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Dynamic Element Matching (1)

• Errors in DAC paths cause signal dependent error
• Signal dependent error gt Distortion

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Dynamic Element Matching (2)

• Scrambler randomly selects a sequence of Sn such
  that Vout equals (1)
• The error, e, is uncorrelated with the input
  signal if it is done correctly
• This will effectively spread DAC noise power in
  the frequency spectrum

(1)
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DEM encoder from 1

• With DEM encoder from 1 it can be shown that
  DAC noise inherits statistical properties of the
  pseudorandom sequence used in DEM
• This can be used to estimate the mismatch in the
  DAC paths
• Each path error is related to a specific
  pseduorandom sequence

DAC path errors
Known sequences
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DAC Noise Cancellation

• Detect presence of known pseduorandom signal,
  sn, in output, un esn, by calculating the
  covariance
• Estimate DAC path error, e, from covariance
• Multiply psedurandom sequence by path error
  estimate and subtract from output
• Repeat for all DAC paths

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Gain Error Calibration (GEC) from 1

• Estimate gain error from covariance of digitized
  residue and pseudorandom signal
• Assuming small e gt(1 e ) 1, multiply
  digitized residue by gain estimate and subtract
  from output

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Bootstrapped switches

• Used on continous-time input sampling switches
• Increased linearity
• Used on switches connected to mid-supply or
  time-constant matching constrains
• Reduced resistance

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Timing

• First stage amplification is most important
• Steal time for first stage Flash from second stage

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Results from 1

• SFDR is improved by 12dB with DNC and GEC enabled
• SNDR is improved by 20dB with DNC and GEC enabled

Signal
Without calibration
With calibration
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Background Digital Calibration Techniques for
Pipelined ADCs
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Outline

• Error Model
• Calibration Method
• Non-linear Interpolation
• Quantization Effects on Interpolation

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Error Model
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Error measurement

• Measure gain error in each stage by applying
  known calibration voltage, Vcal-i

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Simulation results

• Simulated performance (DNL INL) with and
  without gain calibration

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Non-linear Interpolation

• Uses fitting of high order polynomials to
  estimate missing sample.
• Uses causal and noncausal taps

Normalized coefficients
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Non-linear Interpolation

• Limits input bandwidth of converter below Nyquist

Fin lt ½ Nyquist
Fin lt Nyquist
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Non-linear Interpolation

• Interpolation error depends on the number of taps
• Achieve higher bandwith with a certain error by
  using more taps

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Quantization Effects on Interpolation

• Quantization noise limits performance of
  interpolation
• Each tap adds quantization noise to total noise
  power
• Limits the number of taps

Variance vs number of taps
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References

1. Eric Siragusa Ian Galton A Digitally Enhanced
   1.8V 15-bit 40-MSample/s CMOS Pipelined ADC
   IEEE Journal of Solid State, Vol. 39, NO. 12,
   December 2004
2. Un-Ku Moon Bang-Sup Song Background Digital
   Calibration Techniques for Pipelined ADCs IEEE
   Transatctions on Circuits and Systems-II, Vol.
   44, NO. 2, Febuary 1997