ECIT Poster Template

1
System-on-Chip Processor Architectures for Givens
Rotations based Matrix Computations Dr. Zhaohui
Liu, Kevin Dickson, Prof. John V. McCanny

• 1. Abstract
• Extensive research devoted to the development of
  modern signal processing algorithms and methods
  which have widespread potential
• provided they can be implemented in real-time
  using cost effective hardware/software solutions
• However, if fabricated in an ASIC technology
  these implementations become fixed and are not
  particularly flexible
• Alternative Application Specific Instruction Set
  Processor (ASIP) for implementing SoC processor
  blocks
• can be used to construct real-time systems for
  modern signal processing computations

• 3. Algorithms
• QR Decomposition (QRD)
• Singular Value Decomposition (SVD)
• CORDIC
• Approximate Rotations

• 4. Architectures
• Systolic Arrays
• Application-Specific Instruction set Processors
  (ASIPs)

• 2. Applications
• Smart Antennas for next-generation wireless
  telecommunication
• Adaptive Beamforming for RADAR

• 5. Summary
• Design of a new Application Specific Instruction
  Set Processor (ASIP) for implementing SoC
  processor blocks
• Can be used to construct real-time systems for
  modern signal processing computations
• Exploits similarities in the QR Decomposition
  (QRD) and Singular Value Decomposition (SVD)
  algorithms and uses a CORDIC approach to
  implement the internal computational unit
• This combination, incorporating programmability,
  provides a flexible alternative to more dedicated
  solutions
• Further research has involved an investigation
  into alternative computational methods
• Approximate Rotations algorithm was identified as
  a preferable option to the CORDIC algorithm as it
  was found to offer lower overall computation
  times. A hardware implementation of this
  algorithm was then explored.