H'Nomoto

1
Installation and Test of the ATLAS Muon Endcap
Trigger Chamber Electronics 
H.Nomoto ICEPP, University of Tokyo
Contents

• General ATLAS detector status
• Endcap muon trigger system
• TGC installation procedure
• Purpose and procedure of sector test
• Future test programs foreseen in the pit
• Conclusion

2
General ATLAS detector status
3
LHC-ATLAS Experiment
Barrel muon chamber
EM calorimeter
Inner tracker
7TeV proton
7TeV proton
Solenoid magnet
25m
Barrel toroid magnet
Endcap muon chamber
45m
Hadron calorimeter
Endcap toroid magnet
4
Latest ATLAS construction status

• In progress
• Solenoid and barrel toroid magnets were
  installed.
• Barrel and endcap calorimeters were also
  installed.
• Inner detectors are being constructed and
  lowered to the pit.
• Over half of muon barrel chambers were
  installed.
• First TGC big wheel station was installed.

5
Solenoid field mapping complete
Bz normalization
4
3
2
1
0
20
30
40
60
10
50
del Bz normalization(x1000)
-1
-2
-3
-4
Probe number
This solenoid was designed and made in JAPAN.
In total of 50 hours, the magnetic field was
measured on 250k points inside the solenoid
volume (Four different current values). And the
expected magnetic field was confirmed.
6
Endcap muon trigger system
7
Level1 trigger system
Calorimeter Trigger
Muon Trigger
ATLAS Level 1 trigger rate is max 75kHz (can be
raised to 100kHz).
Endcap Muon Trigger (TGC based)
Barrel Muon Trigger (RPC based)
Front-end Preprocessor
Jet/ Energy-sum Processor
Cluster Processor
Muon Trigger/CTP Interface
Muon trigger
Central Trigger Processor
TTC
TGC consists of three stations triplet, middle
doublet and pivot doublet.
Barrel Toroid

• With three stations,
• muon hit position
• momentum (more than 6GeV Pt)
• are measured.

EC Toroid
8
The first big wheel station on C-side installed
25m
9
TGC Electronics
Big Wheel edge
Counting Room
On TGC chambers
TGC1
TGC2
TGC3
VME64 crates
HSC(VME) crate
PS-Board
ASD
Trigger crate
SLB ASIC
PP
Trigger
delay BCID
H-Pt wire
3/4 Coin. Readout
Sector Logic
MUCTPI
PP
JRC
delay BCID
H-Pt strip
Readout crate
DCS-PS
Doublets
Readout
ROD
ROB
ASD
PP
SLB ASIC
delay BCID
SSW
2/3 Coin. Readout
Control crate
PP
JRC
delay BCID
Control
CCI
HSC
DCS-PS
Triplet
TTC
TTCvi
CTP
Service PP
CAN
DCS LCS
TTC signal fanout to PS-Boards
TTCrq
10
TGC Electronics
Big Wheel edge
Counting Room
On TGC chambers
TGC1
TGC2
TGC3
VME64 crates
HSC(VME) crate
PS-Board
ASD
Trigger crate
SLB ASIC
PP
Trigger
delay BCID
H-Pt wire
3/4 Coin. Readout
Sector Logic
MUCTPI
PP
JRC
delay BCID
H-Pt strip
Readout crate
DCS-PS
Doublets
ROD
ASD
PP
SLB ASIC
delay BCID
SSW
2/3 Coin. Readout
Control crate
PP
JRC
delay BCID
CCI
HSC
DCS-PS
Triplet
TTCvi
Service PP
CAN
TTC signal fanout to PS-Boards
TTCrq
11
TGC Electronics
Big Wheel edge
Counting Room
On TGC chambers
TGC1
TGC2
TGC3
VME64 crates
HSC(VME) crate
PS-Board
ASD
Trigger crate
SLB ASIC
PP
Trigger
delay BCID
H-Pt wire
3/4 Coin. Readout
Sector Logic
MUCTPI
PP
JRC
delay BCID
H-Pt strip
Readout crate
DCS-PS
Doublets
ROD
ASD
PP
SLB ASIC
delay BCID
SSW
2/3 Coin. Readout
Control crate
PP
JRC
delay BCID
CCI
HSC
DCS-PS
Triplet
TTC
TTCvi
CTP
Service PP
CAN
TTC signal fanout to PS-Boards
TTCrq
12
TGC Electronics
Big Wheel edge
Counting Room
On TGC chambers
TGC1
TGC2
TGC3
VME64 crates
HSC(VME) crate
PS-Board
ASD
Trigger crate
SLB ASIC
PP
delay BCID
H-Pt wire
3/4 Coin. Readout
Sector Logic
PP
JRC
delay BCID
H-Pt strip
Readout crate
DCS-PS
Doublets
Readout
ROD
ROB
ASD
PP
SLB ASIC
delay BCID
SSW
2/3 Coin. Readout
Control crate
PP
JRC
delay BCID
CCI
HSC
DCS-PS
Triplet
TTC
TTCvi
CTP
Service PP
CAN
TTC signal fanout to PS-Boards
TTCrq
13
TGC Electronics
Big Wheel edge
Counting Room
On TGC chambers
TGC1
TGC2
TGC3
VME64 crates
HSC(VME) crate
PS-Board
ASD
Trigger crate
SLB ASIC
PP
delay BCID
H-Pt wire
3/4 Coin. Readout
Sector Logic
PP
JRC
delay BCID
H-Pt strip
Readout crate
DCS-PS
Doublets
ROD
ASD
PP
SLB ASIC
delay BCID
SSW
2/3 Coin. Readout
Control crate
PP
JRC
delay BCID
Control
CCI
HSC
DCS-PS
Triplet
TTCvi
Service PP
CAN
DCS LCS
TTC signal fanout to PS-Boards
TTCrq
14
TGC Electronics uses four type of ASICs
TGC1
TGC2
TGC3
VME64 Crates (USA15)
HSC(VME) (Big Wheel edge)
PS-Board on TGC chambers
ASD
Trigger crate
SLB ASIC
PP
delay BCID
H-Pt wire
3/4 Coin. Readout
Sector Logic
H-Pt
PP
JRC
delay BCID
H-Pt strip
Readout crate
DCS-PS
Doublets
ROD
ASD
H-Pt Board
PP
SLB ASIC
delay BCID
SSW
2/3 Coin. Readout
Control crate
ASD
PP
JRC
delay BCID
SLB
CCI
HSC
DCS-PS
Triplet
PP
TTCvi
Service PP
CAN
DCS LCS
TTC signal fanout to PS-Boards
ASD card
TTCrq
PS Board
15
conv
TGC Electronics uses Antifuse FPGAs
TGC1
TGC2
TGC3
VME64 Crates (USA15)
HSC(VME) (Big Wheel edge)
PS-Board on TGC chambers
ASD
Trigger crate
SLB ASIC
PP
VME
delay BCID
H-Pt wire
3/4 Coin. Readout
Sector Logic
JRC
PP
JRC
delay BCID
H-Pt strip
Readout crate
DCS-PS
Doublets
H-Pt Board
ROD
SSWRX
ASD
PP
SLB ASIC
delay BCID
SSW
2/3 Coin. Readout
VME
PS Board
Control crate
PP
JRC
delay BCID
CCI
HSC
VME
DCS-PS
Triplet
TTCvi
Service PP
CAN
SSWTX
TTC signal fanout to PS-Boards
HSC Board
TTCrq
SSW Board
16
TGC installation procedure
17
Two working areas
ATLAS pit
Sector assembly site
12 sectors form one big wheel station.
18
Sector assembly

• Procedure
• Horizontal assembly
• frame assembly
• cable arrangement
• gas pipe arrangement
• Vertical assembly
• chamber installation
• Install on-detector electronics and test
• Sector test
• Apply high voltage to chambers
• Test with radioactive source or cosmic ray

1
2
3
19
Installation into the ATLAS pit
lowered to the pit
moved to the pit
Schedule
built up to a big wheel
20
Purpose and procedure of sector test
21
Sector test electronics
19 Mini-rack on TGC1 wheel HSC Crate LV / HV /
LV-distributors patch-panel for optical fibers
TGC Triplet TGCs per 1/12
Service Patch-Panel
ASD
PS Boards
HSC Crate Special VME Crate CCI-HSC
interface (H-Pt Boards) SSW Boards (DCS card)
Triplet PS-Pack PS Boards in Al boxes Service
Patch-Panel Board
22
Sector test
Method Send test pulses to ASD

• Purpose
• Final check before installation
• On-detector electronics
• DCS (temperature, position, threshold)
• Cable connections
• Confirm timing adjustment functionality

23
Signal flow

• Procedure
• Set parameters of ASICs on PS boards
• Send TTC test pulses to all ASD channels
• Check output data

TGC1
Readout crate
Readout
test ROD
Slink Receiver
ASD
PP
SLB ASIC
delay BCID
SSW
2/3 Coin. Readout
Control crate
PP
JRC
delay BCID
test pulse
Control
CCI
HSC
DCS-PS
Triplet
TTCvi
Service PP
CAN
DCS LCS
TTC signal fanout to PS-Boards
TTCrq
L1A, reset, test pulse
24
Troubles
Result

• insufficient connection
• cable swapping
• broken cables
• electronics failure
• dead channels on chamber

• We have checked TGC sectors before installation
• - Have found some troubles and fixed them.

Delay scan

• We have confirmed timing adjustment
  functionality with accuracy of sub-nano second.

Current bunch
Next bunch
Previous bunch
Delay scan method Take data with changing test
pulse delay values
25
Future test programs foreseen in the pit
26
Full big wheels test in the pit
TGC1
Parts checked in sector test
ASD
PP
SLB ASIC
delay BCID
2/3 Coin. Readout
readout
control
PP
JRC
delay BCID
test pulse
DCS-PS
Triplet
TTC
Service PP
CAN
DCS LCS
TTC signal fanout to PS-Boards
TTCrq
27
Full big wheels test in the pit
Purpose - Check trigger path as well as readout
one
Method - Send test pulses to ASD
TGC1
TGC2
TGC3
VME64 Crates (Control room)
HSC(VME) (Big Wheel edge)
PS-Board on TGC chambers
ASD
Trigger crate
SLB ASIC
PP
Trigger
delay BCID
H-Pt wire
3/4 Coin. Readout
Sector Logic
MUCTPI
PP
JRC
delay BCID
H-Pt strip
Readout crate
DCS-PS
Doublets
Readout
ROD
ROB
ASD
PP
SLB ASIC
delay BCID
SSW
2/3 Coin. Readout
Control crate
PP
JRC
delay BCID
test pulse
Control
CCI
HSC
DCS-PS
Triplet
TTC
TTCvi
CTP
Service PP
CAN
DCS LCS
Parts checked in full test
TTC signal fanout to PS-Boards
TTCrq
28
Timing setup strategy for beam collision
TGC must make level1 trigger decision at each
40MHz bunch.
Timing adjustment is one of the most important
issues.
Strategy

• Before beam collision,
• timing adjustment is synchronized to 40MHz clock

Time from beam collision to SLB input

TOF cable delay signal delay in PP
emulate
confirm
delayed test pulse

• After beam collision,
• - keep the signal delays
• - adjust phase between bunch crossing timing and
  TTC clock by changing TTC clock skew.

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Before beam collision
delayed test pulse
BC
TGC hit
PP in
SLB in
replace
cable delay
signal delay
TOF
Confirm signal delays
SLB in
BC
TGC hit
PP in
cable delay'
TOF
signal delay'
replace
delayed test pulse'
signal delay
SLB ASIC
PP

• Procedure
• Set test pulse delays properly.
• Confirm necessary signal delay values by checking
  test pulse data.

3/4 Coin. Readout
test pulse delay
JRC
TTC
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After beam collision
Bunch crossing
adjust phase
40MHz TTC clock
signal delay
SLB ASIC
PP

• Procedure
• Take data with changing TTC clock skew.
• Confirm signal delays with synchronized to beam
  collision by checking data.

3/4 Coin. Readout
clock
JRC
TTC
31
Preparation for the beam collision

• Cosmic run
• Single beam halo run

Purpose Provide trigger for other detectors
Low acceptance with the trigger setup for nominal
beam collision
TGC
TGC
We will introduce one station coincidence to
achieve enough trigger rate for cosmic run or
single beam halo run.
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Conclusion
33
Installation

• We established sector test procedure.
• In TGC1 test, all electronics channels were
  confirmed.
• Only five channels on chambers were found to be
  dead among over 30k channels of TGC1.
• We completed sector tests for both C-side TGC1
  (the first big wheel station) and TGC2.
• TGC1 was installed into the pit.
• TGC2 will be installed in Jan.07.
• We continue sector test for remaining sectors in
  cooperation with sector assembly.

Future test plan

• We will start full big wheels test from Mar.07.

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memo
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• ASIC technology
• - ASD Sony Bipolar 'Analog Master Slice
  Process'
• PP Rohm Full-custom CMOS 0.35 micron
• SLB Rohm Full-custom CMOS 0.35 micron
• HPT Hitachi Gate-Array 0.35 micron
• Antifuse FPGA
• VME controller, JRC, HPT conv Actel SX-A
• SSW RX/TX Actel Axcelerator