SCIPP R

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SCIPP RD on Long Shaping-Time Electronics
SLAC SiD Workshop October 26-29, 2006 Bruce
Schumm
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The SCIPP/UCSC ILC HARDWARE GROUP
Faculty/Senior Vitaliy Fadeyev Alex Grillo Bruce
Schumm Abe Seiden
Post-Docs Jurgen Kroseberg
Students Greg Horn Gabriel Saffier-Ewing
Lead Engineer Ned Spencer Technical Staff Max
Wilder, Forest Martinez-McKinney
(Students are undergraduates from physics)
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Alternative shorter ladders, but better point
resolution

• The LSTFE approach would be well suited to use in
  short-strip applications, and would offer several
  potential advantages relative to other approaches
• Optimized for LC tracking (less complex)
• More efficient data flow
• No need for buffering

Would require development of 2000 channel chip w/
bump bonding (should be solved by KPiX
development)
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The LSTFE ASIC
Process TSMC 0.25 ?m CMOS
1 ?s shaping time analog readout is
Time-Over-Thresh
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128 mip
1 mip
Operating point threshold
Readout threshold
1/4 mip
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Electronics Simulation
Detector 167 cm ladder, 50 ?m pitch, 50 ?m
readout
Analog Measurement Employs
time-over-threshold with 400 ns clock period
lookup table provides conversions back into
analog pulse height (as for actual data)
RMS
Gaussian Fit
Essential tool for design of front-end ASIC
Detector Resolution (units of 10?m)
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Proposed LSTFE Back-End Architecture
Low Comparator Leading-Edge-Enable Domain
81 Multi-plexing (?clock 50 ns)
FIFO (Leading and trailing transitions)
Event Time
Clock Period ? 400 nsec
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DIGITAL ARCHITECTURE FPGA DEVELOPMENT
Design permits real-time accumulation and readout
of hit information, with dead time limited only
by amplifier shaping time
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INITIAL RESULTS
LSTFE-2 chip mounted on readout board
FPGA-based control and data-acquisition system
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Qin 1.0 fC
Qin 0.5 fC
Comparator S Curves Vary threshold for given
input charge Read out system with FPG-based
DAQ Get 1-erf(threshold) with 50 point
giving response, and width giving noise
Qin 1.5 fC
Qin 2.0 fC
Stable behavior to Vthresh lt 10 of min-i
Qin 2.5 fC
Qin 3.0 fC
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Noise vs. Capacitance (at ?shape 1.2
?s) Loaded with Capacitor Measured dependence
is (noise in equivalent electrons) ?noise 375
8.9C with C in pF. Connected to
Ladder Noise is approximately 30 worse are
currently exploring long shaping-time shielding
requirements
Expected
Observed
1 meter
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• Power Cycling
• As designed Achieve 40 msec turn-on due to
  protection diode leakage
• Injecting small (lt 1nA) current Achieve 0.9 msec

Power Control
LSTFE2 will incorporate active feedback to
maintain bias levels of isolated circuitry when
chip is off.
Preamp Response
Shaper Response
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LSTFE2

• The LSTFE2 is currently under development
  submission expected by end of year
• Retain 1.0-1.5 ?s shaping time
• Further S/N optimization (still geared towards
  long ladders
• Off state feedback to achieve power cycling
• 16-32 channels, with multiplexing of compar-ator
  outputs (pad geometry)