CHAPTER 4: PART I

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CHAPTER 4 PART I

• ARITHMETIC FOR COMPUTERS

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The MIPS ALU

• Well be working with the MIPS instruction set
  architecture
• similar to other architectures developed since
  the 1980's
• used by NEC, Nintendo, Silicon Graphics, Sony
• Below is the Interface Representation of an ALU

ALU
3
Numbers

• Bits are just bits (no inherent meaning)
• conventions define relationship between bits and
  numbers
• Binary numbers (base 2)0000 0001 0010 0011 0100
  0101 0110 1000 1001... For an n-bit
  representation The decimals represented
  0...2n-1
• Of course it gets more complicated Numbers are
  finite (possibility of overflow) How can
  fractions and real numbers be represented? How
  can negative numbers be represented?
• We will consider the representation of negative
  numbers.

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Possible Representations
Unsigned Sign Magnitude Ones Compliment signed Twos Compliment signed
000 0 000 0 000 0 000 0
001 1 001 1 001 1 001 1
010 2 010 2 010 2 010 2
011 3 011 3 011 3 011 3
100 4 100 -0 100 -3 100 -4
101 5 101 -1 101 -2 101 -3
110 6 110 -2 110 -1 110 -2
111 7 111 -3 111 -0 111 -1
Works on positives only Addition Complicated Zero not unique Zero unique

• Issues balance, number of zeros, ease of
  operations
• Twos compliment best to represent signed
  integers.

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Converting between positive decimal and binary

• Convert decimal 49 to 8-bit binary 49/2 24 r
  1 24/2 12 r 0 12/2 6 r 0 6/2 3 r 0
  3/2 1 r 1 1/2 0 r 1 Now read the
  remainders from bottom to top the binary
  equivalent is 110001. In 8 bit form, it is 0011
  0001. In 16 bit form it is 0000 0000 0011 0001
• It is very easy to convert from a binary number
  to a decimal number. Just like the decimal
  system, we multiply each digit by its weighted
  position, and add each of the weighted values
  together. For example, the binary value 0100 1010
  represents

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Converting between negative decimal and binary

• Convert decimal -50 to 8-bit binary.
• Convert 50 to binary
• Now read the remainders from bottom upwards 50
  110010
• Extend to 8 bits 0011 0010
• Invert bits 1100 1100
• Add 1 -50 1100 1101
• Answer is 1100 1101
• Convert 1101 1011 to decimal.
• Invert bits 0010 0100
• Add 1 0010 0101
• Convert to decimal
  Final answer -37.

Get 2s compliment
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Twos Complement Number System

• Take 8 bit binary
• 0 0000 00001 0000 0001 -1 1111
  11112 0000 0010 -2 1111 1110 3 0000
  0011 -3 1111 1101? 0111 1111 ?
  1000 0000
• Largest positive 28/2 1
• Smallest negative - 28/2

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MIPS

• 32 bit signed numbers0000 0000 0000 0000 0000
  0000 0000 0000two 0ten0000 0000 0000 0000 0000
  0000 0000 0001two 1ten0000 0000 0000 0000
  0000 0000 0000 0010two 2ten...0111 1111
  1111 1111 1111 1111 1111 1110two
  2,147,483,646ten0111 1111 1111 1111 1111 1111
  1111 1111two 2,147,483,647ten1000 0000 0000
  0000 0000 0000 0000 0000two
  2,147,483,648ten1000 0000 0000 0000 0000 0000
  0000 0001two 2,147,483,647ten1000 0000 0000
  0000 0000 0000 0000 0010two
  2,147,483,646ten...1111 1111 1111 1111 1111
  1111 1111 1101two 3ten1111 1111 1111 1111
  1111 1111 1111 1110two 2ten1111 1111 1111
  1111 1111 1111 1111 1111two 1ten

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Addition Subtraction (4 bit word)

• Using the regular algorithm for binary addition,
  add (512), (-512), (-12-5), and (12-12) in
  Two's Complement system. Then convert back to
  decimal numbers.

512 -512 -12-5 12-12
0000010100001100 00010001 1111101100001100 00000111 11110100 11111011 11101111 00001100 11110100 00000000
17 7 - 17 0
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Examples

• Convert 37, -56, 2, -5 into 8 bit 2s compliment
• Convert the 8-bit signed binary to decimal(a)
  0010 0110 (b) 1001 1011 (c) 0110 1111
• Carryout the addition by first converting into 8
  bits 2s compliment numbers(a) 8923 (b)
  49-23 (c) 556

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Detecting Overflow

• No overflow when adding a positive and a negative
  number
• No overflow when signs are the same for
  subtraction
• Overflow occurs when the value affects the sign
• overflow when adding two positives yields a
  negative
• or, adding two negatives gives a positive
• or, subtract a negative from a positive and get a
  negative
• or, subtract a positive from a negative and get a
  positive
• Consider the operations A B, and A B
• Can overflow occur if B is 0 ?
• Can overflow occur if A is 0 ?
• Detection of overflow in signed bit addition
  Carry in into most significant bit ? carry out.

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Boolean Algebra and logic gates

• Transistors inside a modern computer are digital
  with two values 1, 0 (high and low voltage
  asserted or de-asserted).
• Boolean variable Takes only two values - true
  (1), false (0).
• proposition In formal logic, a proposition
  (statement) is a declarative sentence that is
  true or false.
• Boolean operators Used to construct propositions
  out of other propositions.
• Gates Hardware implementing basic Boolean
  operators. The basic gates are NOT (negation),
  AND (conjunction), OR (disjunction).
• Boolean algebra Deals with Boolean (logical)
  variables and logic operations operating on those
  variables. A Boolean function can be expressed
  algebraically with
• Binary variables
• Logic operations symbols
• Parentheses
• Equal sign.

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Boolean Algebra and logic gates

• Truth tables All possible values of input
  determine various values of outputs. These values
  can be represented using a truth table.
• Logic diagram Composed of graphic symbols for
  logic gates. Represents Boolean functions. To
  represent a function with n binary variables, we
  need a list of 2n combinations.
• Logic blocks are physical components
• Combinational Without memory. The output depends
  only on the current input.
• Sequential Have memory (state). The output and
  state depend on the input and state.

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Truth tables of operators and Logical Gates

• Gates AND, OR, NAND, NOR, XOR.

a AND b ab
a OR b ab
a NAND b ab
a XOR b a b
a NOR b ab
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Truth table for expressions
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Proving identities using truth tables
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Basic Identities of Boolean Algebra
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Proving Boolean identities using algebra

• Boolean identities can be used to simplify
  expressions and prove identities.

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Sum of Products

• Given any Boolean expression, one can draw a
  truth table.
• Given any truth table with inputs and outputs,
  can one get a Boolean expression of each output
  in terms of the inputs corresponding to the truth
  table?
• Example What is the formula of output A in terms
  of inputs x, y, and z?
• First answer Sum of Products Formula

x y z A
0 0 0 1
0 0 1 0
0 1 0 1
0 1 1 1
1 0 0 0
1 0 1 0
1 1 0 0
1 1 1 1
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Sum of Products

• Consider inputs x, y, z outputs F, G
• The sum of products formulae for outputs F and G
  are

x y z F G
0 0 0 0 1
0 0 1 1 0
0 1 0 0 0
0 1 1 0 0
1 0 0 1 1
1 0 1 1 0
1 1 0 1 1
1 1 1 1 1
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Programmable Logical Arrays, PLAs
A PLA is a customizable AND matrix followed by a
customizable OR matrix. It directly implements a
sum of products formula.
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Karnaugh-maps (K-maps)

• K-maps are used to simplify sum of products
  logical formulas (with 2, 3, or 4 inputs) using
  the truth table.
• K-map approach is to minimize the number of
  product terms
• Programs exists to simplify more complicated
  formulas
• A K-map for 2 inputs x, y
• Why the need for simplified formulas? Smaller and
  thus cheaper logical components.

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Example
x y A
0 0 1
0 1 1
1 0 0
1 1 0
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K-maps for 3-4 inputs
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Examples 3 input K-maps
x y z F G H J
0 0 0 0 1 0 0
0 0 1 1 0 0 0
0 1 0 0 0 0 0
0 1 1 0 0 0 0
1 0 0 1 1 1 0
1 0 1 1 0 0 1
1 1 0 1 1 1 0
1 1 1 1 1 0 1
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Examples 3 input K-maps

• The outputs simplify to

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Examples 4 input K-maps
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Combining Gates

• Circuits for output functionsOutput x yz,
  Output x yz and Output (x y)(x z)

y
y
z
z
x
x
Output x yz
Output x yz
x
y
x
z
Output (x y)(x z)
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Multiple Inputs

• We can construct a multiple-input gate consisting
  of many AND gates (or one with many OR gates).
  Due to the Associatively law, the order with
  which the gates are operated is not important.
• The output of a multiple-input AND gate is 1 only
  if all the inputs are.
• The output of a multiple-input OR gate is 1 if
  any of the inputs is 1.
• We can also place multiple inputs to other gates
  such as the NAND, NOR or XOR gates.
• The multiple gates XOR gates indicates 1 of the
  number of 1s of odd and 0 if the number of 1s
  is even. This feature can be used in error
  detection devices.

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Multiple Inputs
31
Design of a computer component.

• Technology gt Performance

Complex Cell
CMOS Logic Gate
Transistor
Wires
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Basic Technology CMOS

• CMOS Complementary Metal Oxide Semiconductor
• NMOS (N-Type Metal Oxide Semiconductor)
  transistors
• PMOS (P-Type Metal Oxide Semiconductor)
  transistors
• NMOS Transistor
• Apply a HIGH (Vdd) to its gate turns the
  transistor into a conductor
• Apply a LOW (GND) to its gate shuts off the
  conduction path
• PMOS Transistor
• Apply a HIGH (Vdd) to its gate shuts off the
  conduction path
• Apply a LOW (GND) to its gate turns the
  transistor into a conductor

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Basic Components CMOS Inverter
NOT Symbol (Inverter)

• .

Out
In
PMOS
Out
In

• Inverter Operation

Vdd
NMOS
Vdd
Vdd
Out
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Basic Components CMOS Logic Gates
NOR Gate
NAND Gate
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Boolean Function Example

• Problem Consider a logic function with three
  inputs A, B, and C. Output D is true if at
  least one input is true Output E is true if
  exactly two inputs are true Output F is true
  only if all three inputs are true
• Show the truth table for these three functions.
• Show the Boolean equations for these three
  functions.
• Show an implementation consisting of inverters,
  AND, and OR gates.

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Boolean Function Example

• Inputs A, B. C Outputs D, E, F
• D is true if at least one input is true.
• E is true if exactly two inputs are true.
• F is true if all the inputs are true.
• The truth table will contain 23 8 entries

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Boolean Function Example PLA
Abbreviated PLA
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Boolean Function Example

• The Boolean Functions corresponding to the
  outputs above are
• The equation for D
• D A B C
• The equation for F
• F ABC
• The equation for E

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The Multiplexor

• Selects one of the inputs to be the output,
  based on a control input
• If (S 0) C A else C B

note we call this a 2-input mux even
though it has 3 inputs! Or a 1-select multiplexor.
0
1
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Implementing a 2-input multiplexor
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The 1 bit Logical Unit for AND and OR
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The Multiplexor with 2 selects

• if (S 00) Out Aelse if (S 01)
  Out Belse if (S 10) Out Celse if (S
  11) Out D

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Designing a Full Adder

• Binary addition is done with carries from right
  to left
• Input and output specification for a 1-bit adder

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Designing a Full Adder

• From the sum of products formula, the Sum is
• The sum of products formula for CarryOut can be
  simplified to give
• One can design a Full Adder circuit withInputs
  a, b, CarryInOutputs Sum, CarryOut
• We will abstract this Full Adder circuit as ?????