LOW-LEAKAGE REPEATERS FOR NETWORK-ON-CHIP INTERCONNECTS

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LOW-LEAKAGE REPEATERS FOR NETWORK-ON-CHIP
INTERCONNECTS
Technion Israel Institute of Technology

• Arkadiy Morgenshtein, Israel Cidon, Avinoam
  Kolodny, Ran Ginosar

QNoC Research Group Electrical Engineering
Department Technion Israel Institute of
Technology Haifa, Israel
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Highlights

• Leakage in NoC links with repeaters

• Selecting the Repeater Type

• Optimizing Repeater Insertion

• Utilization-Oriented Analysis

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Networks-on-Chip (NoC)

• NoC characteristics
• Packet-based data routing
• Multiple Quality-of-Service levels
• Physical layer of NoC
• Low link utilization
• Most links idle most of the time!
• Leakage power is important

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Leakage Reduction in Logic
Subthreshold leakage is dominant at high
temperatures
Solutions

• more

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Leakage Reduction in Repeaters
Solutions
?
specific solutions needed
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Existing Repeater Types
LVT Low-Vt Repeaters

• fast
• high leakage

HVT High-Vt Repeaters

• slow
• low leakage

SVT - Staggered-Vt

• fast (In 0?1)
• slow (In 1?0)
• low leakage (idle)

16 Sylvester et al.
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Research Outline
Network-on-Chip
Low Varying Utilization
Selecting the Repeater Type
Optimizing Repeater Insertion

Utilization-Dependant Optimal Number of Repeaters
SR Sleep Repeaters
DTD Dual-Vt Domino Repeaters
Utilization-Oriented Analysis
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Dual-Threshold Domino (DTD) Repeaters
High-Vt Evaluation Transistors
Low-Vt Pre-charge Transistors
synchronized Clk link
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DTD Repeaters Operation

• Precharge transistors disconnected
• CLK line is synchronized with Data
• Evaluation by HVT transistors slower but
  tolerant to Vt fluctuations
• Each Evaluation transistor drives only one
  transistor at next stage faster and can be
  down-sized

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DTD Repeaters Operation

• Evaluation transistors disconnected
• Precharge to low-leakage mode
• Precharge by LVT transistors - fast

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DTD Repeaters Operation
X
X
0
0
1
1
X
X
X
X
1
0
1
0
X
X

• HVT transistors are off low leakage

0
1
0
1
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DTD Repeaters Operation
X
X
X
X
0
0
1
1
X
X
X
X
X
X
X
X
1
0
1
0
X
X
X
X

• For Data0 - no transition occurs

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DTD Repeaters Operation
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DTD Highlights

• Application of domino and double-Vt techniques
  to low-leakage repeaters

Benefits Effective leakage reduction during
standby Reduced load on each repeater allowing
downscaling and area reduction Tolerance to VT
fluctuations by using HVT evaluation transistors
Drawbacks - Increased dynamic power consumption
due to signaling in domino protocol - Overhead of
clock line and pre-charge wiring
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Sleep Transistors in Repeaters
MTCMOS
Logic
Evolution
SR
Repeaters
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MTCMOS in Repeaters

• Common sleep transistors insertion
• Both NMOS and PMOS are used
• All stages enter and exit sleep mode
  simultaneously
• LARGE sleep transistors
• High routing complexity and wiring overhead

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Repeaters with Per-Stage Sleep Transistor

• Distributed sleep transistors along the link
• Each stage of repeaters has a separate pair of
  sleep transistors
• One stage of repeaters is active
• - others are in low-leakage
• standby
• - Sleep Transistor is heavily loaded and has to
  be scaled with link width

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Repeaters with Per-Stage Sleep Transistor

• Distributed sleep transistors along the link
• Each stage of repeaters has a separate pair of
  sleep transistors
• One stage of repeaters is active
• - others are in low-leakage
• standby
• - Sleep Transistor is heavily loaded and has to
  be scaled with link width

active
sleep
sleep
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Repeaters with Per-Stage Sleep Transistor

• Distributed sleep transistors along the link
• Each stage of repeaters has a separate pair of
  sleep transistors
• One stage of repeaters is active
• - others are in low-leakage
• standby
• - Sleep Transistor is heavily loaded and has to
  be scaled with link width

active
sleep
sleep
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Repeaters with Per-Stage Sleep Transistor

• Distributed sleep transistors along the link
• Each stage of repeaters has a separate pair of
  sleep transistors
• One stage of repeaters is active
• - others are in low-leakage
• standby
• - Sleep Transistor is heavily loaded and has to
  be scaled with link width

active
sleep
sleep
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SR Sleep Repeaters
Parallel link using individual zigzag sleep
transistors

• One sleep transistor per repeater
• Smaller sleep transistors
• Simpler routing
• Zigzag connection
• Only to transistors that are off during sleep
• Number of sleep transistors is reduced by 50

1
0
0
1
0
0
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Sleep Repeater Highlights

• Novel Efficient sleep transistors for repeaters

Benefits Effective leakage reduction during
standby Optimized structure according to
specifics of repeater insertion
Drawbacks - Area overhead - Increased dynamic
power consumption due to additional transistors
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Simulation Setup

• 65nm BPTM models for transistors and
  interconnect
• 32-bit link operating at 105C temperature
• LVT design was used as baseline for repeater
  insertion
• Scaling factor was adjusted for SVT, DTD and SR
  to meet the delay target equal to LVT
• Area, delay and energy were obtained for each
  of the compared techniques

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Total Repeater Area
DTD smallest area - SR largest area
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Energy vs. Utilization

• SVT Least energy at high utilization
• SR Least energy at low utilization

8mm link
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Utilization-Dependant Optimal Number of Repeaters
Set Target Delay (DltDopt)
Repeaters Sizing for (1ltKltn)
Optimal K for minimal Leakage Power - Kleak
Optimal K for minimal Dynamic Power - Kdyn
!
Calculate Ratio of Total Power for Kdyn and Kleak
vs. Utilization
Find for which utilization rates k_leak or k_dyn
is optimal
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Optimal Number of Repeaters
example

• For each k a suitable sizing factor h is found
  to meet the target delay
• Optimal k for minimal leakage is kleak4
• Optimal k for minimal dynamic power is kdyn6

kleak
kdyn
Power vs. k for target D309ps (instead of
Dmin280ps), L10mm
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Number of Repeaters vs. Utilization
example

• Total power as function of utilization for Kdyn
  and Kleak
• Power ratio is calculated for Kdyn and Kleak
• Break-even point is at 40 utilization
• The results of Kleak are up-to 17 better at
  low utilization rates

Prefer Kleak
Prefer Kdyn
Power ratio of Kdyn vs. Kleak
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Summary

• DTD (Dynamic Dual-Threshold) Repeaters
• SR (Sleep Repeaters)
• Zig-zag structure
• SR least power at low utilization
• Thanks to low leakage
• Optimal number of repeaters depends on link
  utilization

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Questions?