332:437 Lecture 19 Time Redundancy

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332437 Lecture 19Time Redundancy

• Time redundancy
• Alternating logic
• Boolean self-dual functions
• Recomputing with shifted operands
• Recomputing with swapped operands
• Recomputing with duplication with comparison
• Software redundancy
• Summary

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Material from Design and Analysis of Fault
Tolerant Digital Systems, by Barry Johnson,
Addison Wesley.
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Time Redundancy

• Reduce extra fault-tolerant hardware at expense
  of time
• Detects transient faults, but not permanent ones
• Method Repeat computation, store results,
  compare results
• Example Have error detection correction, but
  want to know whether fault is permanent or
  transient
• Must keep data around to perform comparison

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Time Redundancy Method
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Extension to Detect Permanent Faults
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Alternating Logic Method

• Time t0 transmit original data
• Time t0 d transmit complemented data
• Detects stuck-at faults on bus

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Example Alternating Logic Bus Transmission
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Self-Dual Boolean Functions

• Dual of Boolean function f is
• fd f (x1, x2, , xn)
• Self-dual Boolean function
• fsd (x) f (x)
• By definition
• fsd xn1 f xn1 fd
• Complementary inputs give complementary outputs

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Alternating Logic Fault Detection Condition

• Detects faults if, for every fault, at least one
  input combination produces non-alternating
  outputs
• Example full adder
• Problem May take some computation time before
  you hit the input combination that reveals the
  fault
• Error latency

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Full-Adder Is Self-Dual
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Recomputing with Shifted Operands (RESO)

• Developed for ALUs
• Encoding function left shift
• Decoding function right shift
• For bit-sliced, ripple-carry adder
• Two-bit arithmetic shift needed to guarantee
  error detection
• Extra hardware
• 3 Shifters
• Storage register
• Comparator
• 2 Extra bits of ALU

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RESO Faults
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RESO Example on ALU
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RESO Problems

• Extra Hardware
• No fault coverage for shifters
• Comparator must be fully self-checking
• Can instead do a circular shift
• Avoids creating 2 extra ALU bit slices
• Complicates carry handling circuit
• Perhaps not worthwhile

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Recomputing with Swapped Operands (RESWO)

• Swap upper lower halves of operands for 2nd
  operation

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RESWO Error Analysis

• Normal mode
• Error in bit slice i affects sum carry out
• Changes result by 0,
  2i, 2i1, 2i 2i1
• Computing with swapped operands
• Error in bit slice i throws off result by 0,
  2ir1, 2ir2, 2ir1 2ir2

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RESWO Example on ALU
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Recomputing with Duplication with Comparison
(REDWC)

• First calculation
• Each 16-bit adder adds lower halves
• Second calculation
• Each 16-bit adder adds upper halves
• Using output carry of 1st comparator as input
  carry
• Both times 2 results are compared and 1 result
  is stored

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First Calculation
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Second Calculation

• Same hardware used 2 times to compare results

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REDWC Summary

• Same fault detection ability as Duplication with
  Comparison
• Can use with 4-bit carry lookahead adders
• Carry bit must ripple through lookahead units

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Example on 32-bit Adder
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Example with Carry Lookahead Adder (CLA)
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Hardware Overhead for Time Redundancy Methods
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Time Redundancy for Error Correction

• Faulty bit slice

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Error Correction Using Time Redundancy

• Works for bit-wise AND operation
• Does not work for arithmetic, since adjacent bits
  are not independent

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Three Methods of Software Redundancy

• Consistency Checks use a priori knowledge of
  information characteristics
• Check that some digitized reading does not exceed
  a known maximum for the sensor
• Amount of cash requested from ATM should never
  exceed maximum withdrawal amount
• Computer should never receive illegal OPCODE from
  program instruction (otherwise, you are executing
  data)
• Compare measured performance of control system
  with predicted performance

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Software Redundancy (continued)

• Packet data transfer systems check for word
  count overflow
• Capability checks
• Periodically write patterns to memory read them
  to see if you get the same data back
• Run ALU test cases compare to correct answers
  stored in ROM
• Check that all processors can communicate each
  sets a bit in shared memory, other CPUs check
  that bit got set

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Software Redundancy (continued)

• N-Version Programming
• Software faults result of incorrect
  design/coding
• Each of N modules designed coded by separate
  programmer group
• Get N results from N software copies compare
  the N results

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N-Version Programming

• Ferociously expensive
• Software designers/coders often make similar
  mistakes
• Does not catch specification errors
• All N groups work from same spec.
• Better method
• Use rigid design methods rules to prevent
  software faults from occurring.
• Perform massive numbers of acceptance tests
  before using the software

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Time Redundancy Summary

• Repeat hardware calculation at some Dt later,
  with a different encoding compare
• Alternating logic
• Recomputing with Shifted Operands
• Recomputing with Swapped Operands
• Recomputing with Duplication with Comparison
• Use software redundancy
• Faults are more likely to be in software than in
  hardware in PC, phone exchanges