Predictable Scheduling for a Soft Modem

1
Predictable Scheduling for a Soft Modem

• Stefan Saroiu University of Washington
• tzoompy_at_cs.washington.edu
• www.cs.washington.edu/homes/tzoompy/
• Michael B. Jones Microsoft Research
• mbj_at_microsoft.com
• research.microsoft.com/mbj/

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Modem Taxonomy

• Traditional Modem Components
• Interface between analog phone lines and digital
  computer components A/D and D/A
• Signal modulations at different rates on DSP
• AT command set control and interpret - controller
• Asynchronous interface between the modem and
  computer UART
• Some modems move functions to host software
• Traditional modems all on modem hardware
• Controllerless modems (winmodems) software
  controller, onboard signal processing
• Soft modems host CPU controller and signal
  processing

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Why Study Soft Modems ?

• Signal Processing done on host CPU
• requires predictable scheduling
• requires low latency responses
• While coexisting with other system activities
• Soft Modem is a background real-time task
• Successful in home computer market
• Low cost
• Easy to update software upgrade

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Driver versions (INT/DPC/THR/RES)

• Vendor version (INT)
• 1. DMA transfers between A/D and D/A and physical
  memory
• 2. when enough data samples, the modem raises an
  interrupt
• 3. inside ISR, process incoming data and provide
  outgoing samples, before buffers exhausted
• Signal processing routines executed
• in a DPC context (DPC)
• in a thread context (THR) scheduled by NT
  scheduler
• in a thread context (RES) scheduled by a
  real-time scheduler based on Rialto/NT

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Interrupt Rate
3 different phases, interrupts very regular
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Elapsed Times in ISR (INT)
1.8 ms on a Pentium II 450 with a repeatable
worst case of 3.3 ms

• PC 99 recommends maximum time during which a
  driver-based modem disables interrupts should not
  exceed 100 µs

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CPU Utilization
16 sustained CPU load
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Elapsed Times in Queued DPC
Interrupt durations now typically lt 6µs But now
long DPCs (as long as old interrupts)

• PC 99 recommends at any instant in time, the
  total execution time required for all DPCs that
  have been queued but not executed should not
  exceed 500 µs

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Samples Pending to be Processed(INT THR 24)
Small relative to 512 sample buffer size
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Coexisting Thread Latencies (INT)
Minimum 8 µs, Maximum 5313 µs
Long distribution tail in INT version
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Coexisting Thread Latencies (THR 24)
Minimum 8 µs, Maximum 2239 µs
Nearly as good as with no modem
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CPU Reservation Abstraction and Implementation

• CPU Reservation abstraction
• ongoing reservation for X time units out of every
  Y units for a thread
• Implementation limitation
• CPU Reservations must be multiples of milliseconds

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Samples Pending to be Processed CPU RES 2ms every
8ms 25
Works well relative to 512 sample buffer size
Dialing
On-hook
Training
Connected
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File Transfer Times
Results for 10 copies of 200,000 bytes each
For 1/8, 2/15, 3/17, 4/17, 7/20 no test passed
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Modem Reservation Ranges
Nonlinear behavior
If period lt 12.5ms, must get 16 to work If
period gt 12.5ms, (period amount) gt 12.5ms must
also hold
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Conclusions

• Signal Processing in interrupt context is
• Unnecessary
• Detrimental to the predictability and latencies
  of the coexisting activities
• The DPC version has similar problems
• Threads help alleviate these problems
• Modem runs well with real-time priorities and
  non-real-time competition
• Real-time scheduler allows control over modems
  degree of interference with other time-sensitive
  activities