EKV3 design kit for 110nm RF-CMOS

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EKV3 design kit for 110nm RF-CMOS
Sadayuki Yoshitomi Toshiba Corporation
Semiconductor Company

• Demonstration of EKV3.0s modeling capability for
  RF-CMOS circuit design.
• Adaptation case of TOSHIBAs 110nm RF-CMOS
  technology
• Modeling accuracy
• DC input-output characteristics
• Gate capacitance at 1MHz
• S-parameter at various bias points
• Scalability of S-parameters
• Load-Pull measurements
• EKV3.0 implementation
• ADS design kit example

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EKV3.0 design Kit
DC and CV
fT-VGS

• Platform Agilents ADS

N-MOSFET Gate length0.11um, Finger
length5um Numbers of fingers10
LoadPull
S-Parameter
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Summary

• EKV3.0 design kit has been demonstrated
• 61 out of 120 model parameter has bee changed
  from the default values.
• EKV3.0 gives good prediction of MOSFETs
• DC and C-V and scaleability (VTH vs. L and W)
• Multi biased S-parameter and scalability.
• Operation under gain compression.
• Currently Agilents ADS is available.
  Implementation into other tools are being planned.