Lecture 3 Interconnection Networks

1
Lecture 3 - Interconnection Networks

• Freely configurable
• Bus-systems
• hierarchical interconnect
• crossbar
• fixed topology
• Pipeline, Ring
• Matrix, Torus
• Hypercube
• Tree

2
Bus system
Bus

• constant trough-put
• actual bandwidth bounded
• standard technology
• improvement by switch technology

3
Hierarchical interconnect
000 001 010 011 100 101 110 111
000 001 010 011 100 101 110 111
4
Routing
0 1
Example for 010 to 110
Level 0
Level 1
Level 2
000 001 010 011 100 101 110 111
000 001 010 011 100 101 110 111
5
Crossbar
6
Mesh and Torus
dimension nodes connectivity diameter
1 n 2 n-1
2 n m 4 (n-1) (m-1)
3 n m l 6 (n-1) (m-1) (l-1)
7
Hypercube
dimension n nodes 2n diameter n connectivity n
8
Parallel Computers
Manufacturer Parsytec, GER Parsytec, GER IBM,
USA Intel, USA Cray Inc., USA SGI, USA SGI,
USA Thinking Machines nCube Siemens Ethernet Beow
ulf
Processor T805 PowerPC/T805 PowerPC I860 Dec
alpha Dec alpha R10000 Sparc Pentium
II DX4-100 Dec alpha
Model Supercluster PowerXPlorer SP-2 Intel
Paragon T3D T3E PowerChallenge CM-5 nCube/2 SCI-Sy
stem
Network 64/32 switched 2D Mesh 32/32 switched 2D
Mesh 3D Torus 3D Torus SIMD Fat-Tree Hypercube 2D
Torus Bus bonded Ethernet
Start-up ms 98 98 25 3
95 154 700 700 ca. 100
Clock rate ns 33 12 3.3 12 7 3.3
5.1 25 25 2.2 10 1.8
bandwidth Mbyte/s 1.2 1.5 120
171 128 500 1200 9 1.7 500
1.2 2.4 120