Cpsc 318 Computer Structures Lecture 4 Instruction Set Architectures and Assembly Programming

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Cpsc 318Computer StructuresLecture 4
Instruction Set ArchitecturesandAssembly
Programming

• Dr. Son Vuong
• (vuong_at_cs.ubc.ca)
• January 13, 2005

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Instruction Set

• Language of the Machine
• More primitive than higher level languages e.g.,
  no sophisticated control flow
• Very restrictive e.g., MIPS Arithmetic
  Instructions
• Well be working with the MIPS instruction set
  architecture
• similar to other architectures developed since
  the 1980's
• used by NEC, Nintendo, Silicon Graphics, Sony

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Common goal of designers
It is easy to see by formal-logical methods that
there exist certain instruction sets that are
in abstract adequate to control and cause the
execution of any sequence of operations.The
really decisive considerations from the present
point of view, in selecting an instruction set,
are more of a practical nature simplicity of the
equipment demanded by the instruction set, and
the clarity of its application to the actually
important problems together with the speed of its
handling of those problems. Burks, Goldstine, and
von Neumann, 1947
Design goals Maximize performance, minimize
cost, and reduce design time
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Instruction sets and assembly programming

• Assembly Language
• Interface architecture presents to user,
  compiler, and operating system
• Usually generated by the compiler

swap (int v, int k) int temp temp
vk vk vk1 vk1 temp
5 k 4 A

• swap
• Sll 2, 5,2 / 2k4
• add 2, 4,2 / 2 vk
• lw 15,0(2) /15vk
• lw 16,4(2) /16vk1
• sw 16,0(2)
• sw 15,4(2)
• jr 31

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Architectures point of view

• Low-level instructions that use the datapath and
  memory to perform basic operations
• Arithmetic and logical
• add, sub, mul
• logical and, or, shift
• Data transfer load, store
• (Un)conditional branch, jump

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Why a register file?
Most machines use general purpose registers
Advantages of registers
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Executing an assembly instruction
1. Program counter has the instruction
address. 2. FSM fetches instruction from memory
and puts it into the Instruction
register 3. Control logic decodes the instruction
and tells the register file, ALU, and other
registers what to do. 4. In an add operation, for
example, data flows from the register through the
ALU and back to the register file.
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MIPS Programming
MIPS Assembly Programming
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MIPS arithmetic

• All instructions have 3 operands
• Operand order is fixed (destination
  first) Example C code A B
  C MIPS code add s0, s1, s2
  (associated with variables by compiler)

Design Principle Simplicity favors regularity
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MIPS arithmetic

• Operands must be registers, only 32 registers
  provided
• Of course this complicates some things... C
  code A B C D E F - A MIPS
  code add t0, s1, s2 add s0, t0,
  s3 sub s4, s5, s0

Design Principle Smaller is faster.
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MIPS notation

• Generic
• op x, y, z x lt-- y op z
• Addition
• add a, b, c a lt-- b c
• addi a, a,10 a lt-- a 10
• Subtraction
• sub a, b, c a lt-- b - c
• sub a, b, 4 a lt-- b - 4
• f (gh) - (ij)
• add t0, g, h t0 lt-- g h
• add t1, i, j t1 lt-- i j
• sub f, t0, t1 f lt-- t0 - t1

We will see this later
A bit more awkward having to use registers
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Registers versus Memory

• C variables map onto registers what about large
  data structures like arrays?
• 1 of 5 components of a computer memory contains
  such data structures
• But MIPS arithmetic instructions only operate on
  registers in the processor, never directly on
  memory.
• Data transfer instructions transfer data between
  registers and memory
• Memory to register
• Register to memory

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Anatomy 5 components of any Computer
Registers are in the datapath of the processor
if operands are in memory, we must transfer
them to the processor to operate on them, And
then transfer back to memory when done
Personal Computer
Computer
Processor
Memory
Devices
Input
Control (brain)
Datapath Registers
Output
These are data transfer instructions
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Registers

• 32 general purpose registers
• 0 .. 31
• 0 is hard-wired to zero (very specific uses)

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Register Zero

• One particular immediate, the number zero (0),
  appears very often in code.
• So we define register zero (0 or zero) to
  always have the value 0.
• Use this register, its very handy!
• add 6,0,5 copy 5 to 6
• This register is defined in hardware, so an
  instruction like
• addi 0,0,5
• will do nothing.

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Basic arithmetic
f (g h) - (i j) 16 f, 17 g, 18
h, 19 i, 20 j
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Role of Registers vs. Memory

• What if more variables than registers?
• Compiler tries to keep most frequently used
  variable in registers
• Writing less common to memory spilling
• Where? On stack
• Why not keep all variables in memory?
• Smaller is faster registers are faster than
  memory
• Registers more versatile
• MIPS arithmetic instructions can read 2, operate
  on them, and write 1 per instruction
• MIPS data transfer only read or write 1 operand
  per instruction, and no operation

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Pointers v. Values

• Key Concept A register can hold any 32-bit
  value. That value can be a (signed) int, an
  unsigned int, a pointer (memory address), etc.
• If you write lw t2,0(t0) then t0 better
  contain a pointer
• What if you write add t2,t1,t0 then t0 and
  t1 must contain?

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Memory Organization

• Viewed as a large, single-dimension array, with
  an address.
• A memory address is an index into the array
• Byte addressing means that the index points to
  a byte of memory.

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Memory Organization

• Bytes are nice, but most data items use larger
  "words"
• For MIPS, a word is 32 bits or 4 bytes.
• 232 bytes with byte addresses from 0 to 232-1
• 230 words with byte addresses 0, 4, 8, ... 232-4
• Words are aligned i.e., what are the least 2
  significant bits of a word address?

Registers hold 32 bits of data
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Addressing Byte vs. word

• Every word in memory has an address, similar to
  an index in an array
• Early computers numbered words like C numbers
  elements of an array
• Memory0, Memory1, Memory2,

• Computers needed to access 8-bit bytes as well as
  words (4 bytes/word)
• For strings byte data transfers later
• Today machines address memory as bytes, hence
  word addresses differ by 4
• Memory0, Memory4, Memory8,

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Notes about Memory Alignment (if time)

• MIPS requires that all words start at addresses
  that are multiples of 4 bytes

• Called Alignment objects must fall on address
  that is multiple of their size.
• See why when get to caches, pipelining

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Data transfer instructions

• Load and store instructions
• load word lw dst, offset(base register)
• store word sw src, offset(base) lt-- target
• Example C code A12 h A8 MIPS
  code lw t0, 32(s3) add t0, s2,
  t0 sw t0, 48(s3)
• Store word has destination last
• Remember arithmetic operands are registers, not
  memory!

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Memory operations - loads
Loading data from memory g h Ai s117
g, s218 h, s319i s0A, h
4, i 8
g h A8

sll t0, s3, 2

lw t1, 32(s0) add s1, s2, t1
muli t0, s3, 4 add t0, s0, t0 lw t1,
0(t0) add s1, s2, t1
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Memory operations - stores
Storing data to memory Ai h
Ai s218 h, s319i s0A, h
4, i 8
Ai h Ai
A8 h A8
sll t0, s3, 2

lw t0, 32(s0) add t0, s2, t0 sw t0,
32(s0)
muli t0, s3, 4 add t0, t0, s0 lw t1,
0(t0) add t2, s2, t1 sw t2, 0(t0)
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Another example
Storing data to memory Ai Ai Ai
4 s218 h, s319 i s0A
0x20, h 4, i 8
sll t0, s3, 2
muli t0, s3, 4 add t0, t0, s0 lw t1,
0(t0) lw t3, 16(t0) add t2, t3, t1 sw
t2, 0(t0)
sll t0, s3, 2
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Return to our first example

• Can we figure out the following code?

swap(int v, int k) int temp temp
vk vk vk1 vk1 temp
5 k 4 A
Swap sll 2, 5,2 add 2, 4,2 lw
15,0(2) lw 16,4(2) sw 16,0(2) sw
15,4(2) jr 31
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Notes about Memory

• Pitfall Forgetting that sequential word
  addresses in machines with byte addressing do not
  differ by 1.
• Many an assembly language programmer has toiled
  over errors made by assuming that the address of
  the next word can be found by incrementing the
  address in a register by 1 instead of by the word
  size in bytes.
• So remember that for both lw and sw, the sum of
  the base address and the offset must be a
  multiple of 4 (to be word aligned)

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And in Conclusion (1/2)

• In MIPS Assembly Language
• Registers replace C variables
• One Instruction (simple operation) per line
• Simpler is Better
• Smaller is Faster
• Memory is byte-addressable, but lw and sw access
  one word at a time.
• A pointer (used by lw and sw) is just a memory
  address, so we can add to it or subtract from it
  (using offset).

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And in Conclusion(2/2)

• Instruction Meaningadd s1, s2, s3 s1
  s2 s3sub s1, s2, s3 s1 s2 - s3lw
  s1, 100(s2) s1 Memorys2100 sw s1,
  100(s2) Memorys2100 s1
• Registers
• C Variables s0 - s7
• Temporary Variables t0 - t9
• Zero zero