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M-RAM%20(Magnetoresistive%20

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Al2O3 (tunneling barrier) SAF. M-RAM M. Bernacki, S. Wasek. Write. Word line ... Tunnel barrier. Ferromagnet II. NiFe (free layer) CoFe (fixed layer) Ru. CoFe ... – PowerPoint PPT presentation

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Title: M-RAM%20(Magnetoresistive%20


1
M-RAM (Magnetoresistive Random
Access Memory)
Kraków, 7 XII 2004r
2
Information flux.
Information transmission
Information Processing
Information storage
Information
Input
Outside word
Output
Magnetic (HDD) Optical (CD, DVD)
DRAM, MRAM
3
Memory categories.
WHY DO WEE NEED M-RAM MEMORY ????
4
Basic attractions of M-RAM.
  • Nonvolatility
  • Speed
  • Low-power consumption
  • Scalability.

5
Basic attractions of M-RAM.
  • Transfer data to microprocessor
  • without
  • creating a bottleneck!

6
History and development...
M-RAM based on
  • M-RAM quick view.
  • Magnetoresistivity.
  • AMR effect - 80-th.
  • GMR effect - 80-th.
  • TMR effect 1995 year.

7
Storage and states of a bit.
MRAM charge and spin.
  • Storage state
  • DRAM charge of capacitor.
  • Flash, EEPROM charge on floating gate.
  • FeRAM charge of a ferroelectric capacitor.

Soft ferromagnet
1
Insulator
Hard ferromagnet
TMR
0
Field Oe
8
Implementationof 1-MTJ / 1-transistor cell.
NiFe (free layer)
Al2O3 (tunneling barrier)
CoFe (fixed layer)
Ru
SAF
CoFe (pinned layer)
Word line
9
Write.
Word line
With digit line current
Without digit line current
10
Write.
RA kOhm-um2
Word line
Easy axis field Oe
11
Read.
Word line
Word line
12
Sizes of MTJ.
Ferromagnet I
NiFe (free layer)
4nm
Al2O3 (tunneling barrier)
1..2nm
Tunnel barrier
CoFe (fixed layer)
3nm
Ru
CoFe (pinned layer)
3nm
Ferromagnet II
13
Other MRAM cell architectures.
Twin cell arrays
  • Circuit is faster than the 1T1TMR implementation.
  • Less atractive on a cell density and cost basis.

Diode cell
  • SOI diodes allow the integration of a memory
    with most circuits without sacrificing silicon
    wafer surface area.
  • SOI diodes suitable for this aplication havent
    been developed yet.

Transistorless array
  • Large reduce in cell area.
  • Complex circuity required to read bit state,
    slow read.

14
MRAM 32Kb memory segment.
Bit line 31
Bit line 0
Digit line
Word line
Word line
Digit line
15
Reference generator.
RMAX
RMIN
Bit line
Digit line
Word line
Wordline
Digit line
RMAX
RMIN
RREF 1/2(RMAX RMIN)
16
1Mb MRAM architecture.
Available modes
  • Active mode
  • Sleep mode
  • Standby mode

17
Examples and performance of M-RAM technology.
  • Motorola semiconductors 2002.
  • Freescale semiconductors 2003/2004.
  • Technology 0.6um, 5-level metal CMOS, copper
    interconnects
  • Capacity 1MB
  • Access time 35ns
  • Technology 0.18mikrons, 5-level metal CMOS,
    copper interconnects
  • Capacity 4MB
  • Access time 15-20ns

18
Roadmap to future storage technologies.
RRAM with CMR
19
Bio MRAM,vision for tomorrow?
Biomolecule labeled by magnetic markers
MRAM array
20
References.
  • Wyklad z przedmiotu Magnetyczne nosniki
    pamieci, AGH
  • Materialy z Uniwersytetu Bielefeld wyklad Thin
    films and nanostructures
  • Materialy seminaryjne z Motorola Labs
  • Materialy z sympozjum VLSI symposium 2002
  • www.freescale.com
  • www.motorola.com

21
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