6-BIT THERMOMETER CODER

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6-BIT THERMOMETER CODER

• SIDDHARTH VERMA
• SAURABH PURI
• KAPIL SETHI
• TAE-YOON PARK
• ADVISOR Dr. DAVID PARENT
• DATE8th May,2006

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OUTLINE

• INTRODUCTION
• Theory of Thermometer Coder..
• Why we use Thermometer Coder..??
• SPECIFICATONS
• DESIGNING
• RESULTS
• CONCLUSION

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INTRODUCTION

• THERMOMETER CODER
• Main block in Digital to Analog Converter.
• Converts the binary weighted digital input bits
  into a thermometer coded outputs.
• Applications

• WHY THERMOMETER CODER?
• High Conversion Speed
• Very Good Dynamic Performance
• Logic Minimization

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Specifications

• Power Consumption0.49mW
• Area1120500
• Input clock at 200 MHz
• Outputs to derive 20 fF each
• Technology- AMIO6

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NC Verilog Simulation
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NC VERILOG SIMULATION (Cont..)
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Longest Path Calculation
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6 Bit Thermometer Decoder Layout
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• Verification

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Thermometer Coder Extracted View
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WAVEFORMS
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OUTPUT WAVEFORMS
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COST ANALYSIS

• Time spent on each phase of the project
• Verifying logic 3 Weeks
  
• Schematic sizing 1 Week
• Verifying Timing 1 Week
• Layout 5
  Weeks
• Post Extracted Timing 3 Days

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Lessons learned

• Start working early on the project.
• Working in a team.
• Careful while doing the layout part.
• More you enjoy working on the project the more
  you will learn.

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CONCLUSION

• The 6-bit thermometer coder works at 200Mhz clock
  frequency
• The project drives 63 outputs with each driving a
  20fF load capacitance
• Meets all timing specifications

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Acknowledgements

• Thanks to Prof. David Parent for his support
  guidance.
• Thanks to Cadence Design Systems for providing us
  wonderful labs.