ECE 551Semester Project Elevator Controller

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ECE 551-Semester Project Elevator Controller

• Depeng Yang, Saijun Zhang
• November 30, 2006
• Electrical Computer Engineering Department
• University of Tennessee
• Knoxville, TN 37996-2100

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Outline

• Design Flowchart
• System Requirements
• Input/Output description
• System Diagram
• Master FSM (finite states machine) description
• Slave FSM description

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Design Flowchart
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System Requirements

• This project is for controlling a four floors
  elevator. The elevator should
• 1) keep its direction unchanged when
  it goes
• 2) do not move until it gets the
  request.

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Input/Output Assignment
Basic Input/output of Spartan3 Demo Board
8 switches4 push buttons 4 7-seg LEDs8 LEDs
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Input/Output Assignment (Input.)

• 1 6 switches (sw0 to sw5) that are in upper
  stand for the request from each floor outside the
  cars. When it are in down, it means no request.
• 2 4 push buttons stand for the floor the people
  inside the car want to go to.

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Input/Output Assignment (output)
1 4 7-seg LEDs show which floor the car is
in. 4 LEDs show the different car condition,
respectively. The number displayed by LED0 shows
car1 condition and the number displayed by LED1
shows car2 condition.
2 four LEDs when it is on show which door is
open.
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System Diagram
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FSM Controller

• Master FSM deal with outside request
• Slave FSM deal with inside request
• Master FSM invokes slave FSM to meet the demand
  of people

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Master FSM

• Function of master FSM Keep direction

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Master FSM Keep direction
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Slave FSM

• S1 car door is open. Passengers enter into the
  elevator
• S2 people in car press the button which
  represents the floor they want to reach
• S3 people press the button
• S4 people press the button
• S5 Car door is close. Car goes on.

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Master and Slave FSM
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Structure interlock signals

• case runfloor is
• when f1 gt fseg1lt"0001"
• car1lt"0001"
• if f1up'1' or
  slavefsmfinish'1' then
  
  
• slavefsmlt'1'
  
  
• else
  
• slavefsmlt'0'
  
• if c1f2'1' or
  c1f3'1' or c1f4'1' or f1up'1' or f2up'1' or
  f2down'1' or f3up'1' then
• runfloorltf2
• car1lt"0100"
• downuplt'1'
• end if
• 
  
• end if

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4 Cars different clocks

• 4 cars use different clocks to avoid conflict
• 4cars Share same outside request but independent
  inside request

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4 Cars elevator
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Simulation
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Simulation
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Resource Report
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Clock delays
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RTL Schematic
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RTL Schematic details
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RTL Schematic details
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Target Altera chip schematic
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Target Altera chip schematic
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Target Altera chip floor plan
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Lessons

• Think your project as simple as you can
• Always check your code in broad
• Keep working

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FPGA for Science Computation

• Accelerate computation in parallel using FPGA
• Pipelined computation

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• THANKS !!!!!!!