Beam Diagnostic

1
Beam Diagnostic
Louis Bellier, Richard Hermel, Yannis Karyotakis,
Julie Prast, Jean Tassan, Sébastien Vilalte
CTF3 CLEX Meeting
12-07-2006
2
Front-end

• Design divided in 3 parts
• Analog front-end board (4 inputs ? 1 S and 2?)
• Digital front-end board (sampling)
• PCI acquisition board (far from radiation)

3
Analog part
4
Analog front-end results

• Test with pulse generator at LAPP
• functionalities OK
• Dynamic OK 12,5 bits.
• Test on BPI chicane with beam at 3A (3/05/06)
• comparison with the control room OK, gain OK.

Sum 1 difference BPI 1
5
Ready for September

• 30 full analog front-end boards
• Electronics modules
• Semi-rigid cables
• Mechanical parts

6
Digital front-end

• Solution
• Using the SAM analog memory.
• Developed by the CEA for HESS2.
• Memory 512 or 1024pts (in September. 2006)
• we need at least 300pts
• Sampling 200MSps.
• Rad-Hard 200kRad
• ? After the SAM ADC rad-Hard 14 bits, 800kSps.
• ? Cheaper, faster and more accurate than ADC on
  VME board
• ? 35kRad technology due to FPGA

7
Digital front-end principle
ADC
14
S
SAM
clk1
clk
clk1
ADC
14
?1
SAM
clk1
clk1
clk
ADC
14
?2
SAM
clk1
clk1
clk
SPECS Mezzanine board
FPGA
RJ 45
// Bus
clk
OR
clk1
Optical Out
5
5
Ser/Des
16
clk 200MHz
clk1 800kHz
Blocking
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Digital front-end board
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Specs Mezzanine
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Acquisition
The chained specs mezzanines ( 4 at least)
Digital front-end board
Specs slave
Ethernet cable
Digital front-end board
Specs slave
Digital front-end board
Service box
Service box
Specs slave
Control room
100m
100m
Master board 4 channels
Master Board
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Specs PCI Board
12
Disposition around the beam
Analog front-end under the beam
Analog signals by RJ45 (SFTP cat.6)
5 meters
Power supply distribution board
Digital Front-end boards in crate
Blocking
Ethernet cable to the acquisition
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Conclusion

• Analog front-end board in production. 30 boards
  expected for September
• A complete test chain ready for the next run
• Analog part digital part (prototype)
  acquisition part
• Digital front-end prototype designed
• Specs chain under test
• A design rad tolerant up to 35kRad
• A standard solution

14
Delay Loop Radiation Measurement (RPL)
31.7 0.12 0.104 1.38
Integrated dose in kRad Beam line Girder Girder
food Inner wall
200.4 0.34 0.105 0.45
35.5 75.0 1.06
75 6.2 3.3 3.9
Swimming Pool
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