AMS

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Heat Sink Effect on Thermal Design and Analysis
of JSBC Board
A.- S. Wu and C.- R. Lee
June 16, 2003
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Outline

• 1. Introduction 3
• 2. Analysis Results 5
• 3. Discussion and Summary
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• Figures 112 14

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1. Introduction

• Because the gap between the heat sink(H.S.) and
  the Microprocessor is around 1.0 mm and the
  filled thermal pad with a low thermal
  conductivity, the thermal resistance between the
  H.S. and the Microprocessor is large, leading to
  a high calculated working temperature on the
  die. There are two alternatives to improve the
  die working temperature by reducing the thermal
  resistance. First, the gap between the H.S. and
  the Microprocessor can be re-designed to be
  smaller. Secondly, the gap filler can be selected
  with a large thermal conductivity.

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• Here, sensitivity analysis is performed to
  understand the effect of the thermal resistance
  between the H.S. and the Microprocessor on the
  die working temperature. Four Cases are chosen to
  analyze JSBC working temperature Case A, without
  the H.S. Case B, a half value of the original
  thermal resistance Case C, only one tenth of
  the original thermal resistance. In addition to
  the above three cases, according to the thermal
  properties of the thermal pads or greases used in
  CSIST, and collected by Mr. Lin, CHO-THERM-1671
  has the largest thermal conductivity among these
  materials. Its standard thickness is 0.38 mm.
  Therefore, the gap between the

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• Heat Sink and the Microprocessor is redesigned
  to be 0.3 mm in order to fit the thermal pad
  thickness. Thus, the calculated thermal
  resistance between the H.S. and the die is around
  2.9 ?/W. This final possible design is denoted as
  Case D.
• Except the H.S. design, power dissipation and
  boundary conditions and thermal management design
  of JSBC are same as that of the original design.
  The description can be referred to the Doc. Of
  May 14, 2003, Verification of thermal design
  and analysis of JSBC board (II). The component
  arrangement and Heat Sink design are shown in
  Figures 1 and 2 respectively.

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2. Analysis Results

• 2.1 Case A No H.S.
• Due to a large gap and a small thermal
  conductivity of the thermal pad, the H.S. of the
  original design doesnt seem to reduce the
  Microprocessor die working temperature as
  expected. Figures 3 and 4 show the JSBC
  predicted working temperature for all layers, the
  Microprocessor respectively. The comparison of
  the predictions and experiments is already
  described in the above Doc. Here, the H.S. is
  removed to calculate the die temperature in
  order to understand its effect on the die
  working temperature.

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• Fig. 5 shows the predicted working temperature
  of JSBC board. By a comparison of the die
  temperature with the original design results, an
  increase of die working temperature of around 10
  ? is resulted from the removing of the H.S. Thus,
  the H.S. should be reserved to be a significant
  heat path of the Microprocessor power
  dissipation.

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• 2.2 Case B A half value of the gap thermal
  resistance
• If the gap between the H.S. and the
  Microprocessor is redesigned to reduce to be 0.5
  mm, the thermal resistance will be 7.5 ?/W.
  Figures 6 and 7 show the JSBC predicted working
  temperature with a gap thermal resistance of 7.5
  ?/W for all layers, the Microprocessor
  respectively. The calculated results show that
  the die working temperature can be reduced to be
  about 4 ?. Although the decrease value 4 ? is not
  large as compared to the original die working
  temperature 77.6 ?, it still contribute a higher
  reliability than the original one.

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• 2.3 Case C One tenth value of the gap thermal
  resistance
• If the gap can be reduced to be very small and a
  substitute of the gap filler can be found with a
  much higher thermal conductivity, there is a
  chance that the thermal resistance of the gap
  between the H.S. and the Microprocessor can be
  reduced to be the order of one tenth of the
  original value, 1.5 ?/W . Figures 8 and 9 show
  the predicted working temperature of JSBC board
  of Case C for all layers respectively. The
  results tell that even the gap thermal resistance
  is reduced to be a value to be negligible as
  compared to other thermal resistance, the die
  working temperature is still on the order of 65
  ?. This is attributed to the existed resistance
  at the H.S. edge fixed on the board and the
  Microprocessor mounting resistance.

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• 2.4 Case D The final possible design
• Figures 1012 show the calculated temperature of
  JSBC board for mounting side, the die and the
  Heat Sink respectively with the thermal pad
  CHO-THERM-1671 as the gap filler. The results
  show that the die working temperature is around
  68 ?. This value is lower than that of the
  original design calculated results for 9.4 ? and
  far below the allowable temperature 105 ?. If
  possible, the final design shall be adopted to
  reduce the component temperature, leading to an
  increase of GDAQ reliability.

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3. Discussion and Summary

• 1) If the Heat Sink is not used to conduct the
  Microprocessor power dissipation to the Crate,
  the predicted die working temperature will
  increase significantly to be around 87.2?. Thus,
  the Heat Sink is still to be a good thermal
  management method
• 2) The predicted working temperature of the
  Microprocessor die is around 73.4? as the gap
  between the Heat Sink and the Microprocessor is
  reduced to be 0.5 mm. A decrease of the die
  temperature is around 4 ? as compared to the
  original design results also can enhance the
  reliability of GDAQ. Thus, it is worth
  re-designing to reduce the gap.

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• 3) With a very ideal design to reduce the gap
  resistance to be very small, 1.5 ?/W, the
  predicted die working temperature can
  significantly decrease to be 65.4?. Thus, the die
  working temperature can be reduced to a limit
  value on the order of around 65?. This value is
  far below the allowable temperature 105?as shown
  in the data sheet. Although the thermal
  resistance of 1.5 ?/W is not easy to obtain, a
  better thermal pad still can be sought to improve
  the thermal resistance to reduce the die working
  temperature as possible as it can be.

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• 4)The finally possible design can reduce the die
  predicted working to be 68 ?. Although this
  temperature cannot be as small as Case C, it is
  within our expectation to be far below the
  allowable temperature. Thus, Case D will be
  adopted to manage the Microprocessor power
  dissipation to the Crate effectively.

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Figure 1. Part location arrangement of JSBC board.
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Figure 2. The heat sink for JSBC PCB thermal
management.