Title: Laser Projection System
1Laser Projection System
Design and Construction
2Why LPS?
- Theoretically superior resolution due to the
coherence of laser light - Strong potential advantages in color range
offering better image quality (twice as many as
CRT)
3Initial Design Specifications
- Projection Distance lt8 ft
- Projection Field Size 3x3 ft
- Image Resolution gt200x200 pixels
- Refresh Rate gt 4 frames/sec
- Size lt2.5x2.5x0.75 ft
- Weight lt20 lbs
4Laser Light Source
5The HeNe
Possible Laser Light Sources
NdYAG Pulsed
Reprinted w permission from Spectra-Physics
6Laser Diode
- Affordable (lt12.00 each)
- Very stable, reliable
- Greater beam divergence (proving to be
beneficial) - One disadvantage being relatively low power
7Laser Diodes Considered
Pointer Diode
- gt1 mW
- Optics built in
- Only specific Voltage needed
- 5 mW
- No optics included
- More Complex Driving Circuit
8Final Implementation
- Very inexpensive and easy to use.
- Power output 1mW
- Offering the advantage of variable beam divergence
Reprinted with permission of http//www.geocities.
com/lemagicien_2000/elecpage/chlaser/chlaser.html
9Diode Laser Operating Characteristics
- Wavelength is highly dependent upon temperature
10Beam Dispersal Mechanism
- Optical system must appropriately disperse beam
paths across LCD as well as projection field. - Can be partially accomplished by intrinsic beam
divergence
11Beam Profile
- Measured divergence angle of 1.4º should be
adequate - Exploiting optics built into pointer diodes
Measured at 3 feet
12Laser Diode Housing
- As many as 100 independent AlGaInP lasers
operating at 635 nm. - Each at 1 mW output for up to 100 mW optical
power total. - Final realization included more than 60 lasers
13Optic Deflection System
14Design 1Chopper Array
15Chopper Assembly Refresh Rate
Reshesh Rate vs. Number of Choppers
Refresh RatePixel Count Chopper rate / Number
of Choppers 5Hz(640480) (1.536x106
chops/sec) / N Ngt1
Sample solutions
16Design 2 Duel Rotating Mirror Assembly
17Problems With 2 mirror Design
- Loss of usable light due to rotating mirrors
decreasing efficiency - Cost of increasing the Light (additional lasers
needed to produce the picture) - Overall durability and alignment of the device
during transportation
18Final Design Single Tilting Mirror Assembly
19Specs For Mirror Assembly
- Refresh Rate of 4-7 Frames a second
- (240 420 Frames a minute)
- Swept area 6X8 inches Square
- Motor Angular Velocity 120-210 RPMs
- Sweep Angle 13 degrees
20Mirror Geometry and Assembly
21Equations for Mirror Mount
Mirrors Mounted Angles
?rest tan-1(2.206/7.5) 9.65deg from
vertical ?max((tan-1(2.2/12))/2)-9.65 9.65-16
.26/8.13 1.22deg from vertical ?min9.65(tan-1
(2.2/5.4))/2 9.65-22.16/2 20.7deg from
vertical
?Rest angle of mirror is its angle in which to
reflect laser to center of LCD ?max angle of
mirror to reflect to bottom of LCD ?Min angle
of mirror to reflect to top of the LCD
22Laser Driving Circuitry
23Laser Diode Driver Circuit Specifications
- Must supply a constant 4.6 volts across every
laser - Needed to be able to power up to 10 lasers on
each of the individual circuits. - Must provide safeguard against high currents
- Inexpensive and readily available.
24Laser Diode Driver Chip
- Automatic Power Control (APC) Chip purpose is
to drive high powered laser diodes - Pros
- Voltage Range of 3-9V DC
- Little or no diode power fluctuation
- Pre-made
- Cons
- Designed to work with one laser diode, maximum
output current is 100 mA. - Very expensive 30.00 a chip!
Reprinted with permission of NVG, INC
25Laser Diode Driver Design
- Use a voltage regulator LM317T
- Maximum 1.5A output current
- Output is short-circuit protected.
- Output voltage 1.2V to 37V output range
- Very cheap, less than 1 per unit.
- Current Limit constant with temperature.
26Voltage Regulator
- Voltage out(1.25 (1(R2/R1)).
- 1uf capacitor on output of device.
- Resistor values of R25.7 K-ohms and R12.2
K-ohms - 2 ohm resistor in series with lasers on the
output of the capacitor
Reprinted with permission of Digi-Key
27Circuit Board
28XS95-108 Operation and Functions
29Specifications
- 128 K-Byte SRAM
- Sufficient memory for storing pictures
- 9 Volt DC Power Supply
- Acquired at Radio Shack for 15
- Programmable CPLD
- Driving Circuits for PS/2 input and VGA output
- Microcontroller
- PS/2 Parallel Input
- VGA Output
- Clock Oscillator - 25 MHz -gt 60 Hz
30XS95-108 Prototyping Board as Independent Self
Contained System
31Specifications
- 128 K-Byte SRAM
- Holds the color of each pixel in the picture
- 9 Volt Center Positive DC Power Supply
- Acquired at Radio Shack for 15
- Programmable CPLD
- Driving the VGA signal used for the LCD
- Microcontroller
- PS/2 Parallel Input
- VGA Output
- Clock Oscillator - 25 MHz -gt 60 Hz
32Objective
- To create a VGA signal using VHDL to display
pictures through the SRAM to the LCD
33Standard VGA Signal
- Two Synchronization Signals
- HSYNC
- utilized to signal the end of a line
- VSYNC
- utilized to signal the end of the screen
- RGB Output
- Only the red analog output signal will be
implemented because only a monochrome image is
necessary
34Horizontal Synchronization Signal
- Horizontal pixel resolution 380
35Vertical Synchronization Signal
- Vertical pixel resolution 240
36VGA Signal Generated By VHDL
- entity vgacore is
- port
- (
- reset in std_logic -- reset
- clock in std_logic -- VGA dot clock
- hsyncb buffer std_logic -- horizontal (line)
sync - vsyncb out std_logic -- vertical (frame) sync
- rgb out std_logic_vector(5 downto 0) --
red,green,blue colors - addr out std_logic_vector(14 downto 0) --
address to video RAM - data in std_logic_vector(7 downto 0) -- data
from video RAM - csb out std_logic -- video RAM chip enable
- oeb out std_logic -- video RAM output enable
- web out std_logic -- video RAM write enable
- )
- end vgacore
- architecture vgacore_arch of vgacore is
- signal hcnt std_logic_vector(8 downto 0) --
horizontal pixel counter - signal vcnt std_logic_vector(9 downto 0) --
vertical line counter - signal pixrg std_logic_vector(7 downto 0) --
byte register for 4 pixels
- B process(hsyncb,reset)
- begin
- -- reset asynchronously clears line counter
- if reset'1' then
- vcnt lt "0000000000"
- -- vert. line counter increments after every
horiz. line - elsif (hsyncb'event and hsyncb'1') then
- -- vert. line counter rolls-over after 528 lines
- if vcntlt527 then
- vcnt lt vcnt 1
- else
- vcnt lt "0000000000"
- end if
- end if
- end process
- C process(clock,reset)
- begin
- -- reset asynchronously sets horizontal sync to
inactive - if reset'1' then
37VGA Signal Generated By VHDL
- vsyncb lt '0'
- else
- vsyncb lt '1'
- end if
- end if
- end process
- -- blank video outside of visible region (0,0)
-gt (255,479) - E blank lt '1' when (hcntgt256 or vcntgt360 or
vcntlt120) else '0' - -- store the blanking signal for use in the next
pipeline stage - F process(clock,reset)
- begin
- if reset'1' then
- pblank lt '0'
- elsif (clock'event and clock'1') then
- pblank lt blank
- end if
- end process
- -- video RAM control signals
- G
- -- pixel clock controls changes in pixel register
- elsif (clock'event and clock'1') then
- -- the pixel register is loaded with the contents
of the video - -- RAM location when the lower two bits of the
horiz. counter - -- are both zero. The active pixel is in the
lower two bits - -- of the pixel register. For the next 3 clocks,
the pixel - -- register is right-shifted by two bits to bring
the other - -- pixels in the register into the active
position. - if hcnt(1 downto 0)"00" then
- pixrg lt data -- load 4 pixels from RAM
- else
- pixrg lt "00" pixrg(7 downto 2) -- right-shift
pixel register - end if
- end if
- end process
- -- the color mapper translates each 2-bit pixel
into a 6-bit - -- color value. When the video signal is blanked,
the color - -- is forced to zero (black).
- J process(clock,reset)
38Schematic Implementation
XESS CORPORATION
39Configuring CPLD
XESS CORPORATION
40Hex File Containing Pixels
- - 10 1e00 ff ff ff ff ff ff ff ff ff ff ff ff ff
ff ff ff - - 10 1e10 ff ff ff f2 00 00 00 10 ff ff ff ff ff
ff ff ff - - 10 1e20 ff ff ff ff ff ff ff ff ff ff ff ff ff
ff ff ff - - 10 1e30 ff ff ff ff ff ff ff ff ff ff ff ff ff
ff ff ff - - 10 1e30 ff ff ff ff ff ff ff ff ff ff ff ff ff
ff ff ff - - 10 1e40 ff ff f2 00 00 00 2f ff ff ff ff ff ff
ff ff ff - - 10 1e50 ff ff ff 00 00 10 ff ff ff ff ff ff ff
ff ff ff - - 10 59d0 ff ff ff ff ff 0f 00 f0 ff ff ff ff ff
ff ff ff - - 10 59e0 ff ff ff ff ff ff ff ff ff ff ff ff ff
ff ff ff - - 10 59f0 ff ff ff ff ff f2 00 f0 ff ff ff ff ff
ff ff ff - - 10 59f0 ff ff ff ff ff ff ff ff ff ff ff ff ff
ff ff ff - - 10 5a00 ff ff ff ff ff ff ff ff ff ff ff ff ff
ff ff ff
41Using XILINX to Download Code onto the SRAM of
the XS Board
42Transmissive LCD Projection Panel
- Readily available
- Comparatively affordable (lt150.00)
- Accepts VGA input
43Power Supply Selection
44Power Supply
- Motor -gt12 V
- Fans-gt12 V
- XS 95 board -gt9 V
- LCD screen -gt12 V
- Laser Diode Circuit Boards -gt 4.6 V
- More than enough power output (300 W) for our
realization
45Structural Aspects
46Case Requirements
- Be strong enough to support the weight of the
entire device and all components - Be relatively light weight for portability
- Low cost of final production
- Best utilize the contrast provided by LCD
47Contrast Ratio vs. Transmitted Power
- Trade off between power transmission and contrast
- Angle of incidence chosen to be in range 30-45º
48Chassis Layout
- LCD mounted 45-50 degrees from horizontal
- Lasers mounted 4 inches below LCD
- Mirror mounted 18 inches from center of LCD
49Case Frame
- No such preexisting structures available
- All components were hand manufactured
Dimensions 14 inches by 22 inches
50Case Covering
- Black Acrylic
- Inexpensive
- Easy to fasten to the frame
- It gives the project a professional look
51Hand Made Components
- VGA Switch
- Case
- XS Board Interface Cable
- Motor mount assembly
- Laser array mounting assembly
52Administrative Aspects
53Personal Contributions
54Production Cost and Budget
55Production Total Cost
1202
56Questions or Comments?