Title: Mapping Algorithm for Largescale Field Programmable Analog Array FPAA
1Mapping Algorithm for Large-scale Field
Programmable Analog Array (FPAA)
- Faik Baskaya, Sasank Reddy, Sung Kyu Lim, Tyson
Hall, and David Anderson - School of Electrical and Computer Engineering
- Georgia Institute of Technology
- Atlanta, GA 30332
- baskaya, sreddy, limsk, tyson,
dva_at_ece.gatech.edu
2Motivation Genes law
Power consumption trends in DSP microprocessors
Contribution of analog design
- Signal processing systems require low power
- Analog devices are preferred for low power
operation - Gene Frantz, Digital Signal Processor
Trends, IEEE Micro, Nov 2000
3Field Programmable Analog Arrays (FPAA)
- Array of Computational Analog Blocks (CAB)
- Discrete time and continuous time versions
- Not LUT based gt heterogeneous resources
- Interconnect lines not segmented gt less routing
options - Device/interconnect constraints different from
FPGA gt existing methods do not easily apply!
4Previous Work
- Discrete Time (switched capacitor based) FPAA
- Former IMP EPAC 150 kHz
- Former Motorola MPAA 200 kHz
- Continuous Time CMOS/Bipolar FPAA
- Lee-Gulak1995 125 kHz
- Fast Analog Solutions TRAC 4 MHz
- Floating-gate based RASP 11 MHz
- CAD tools
- Ganesan-Vemuri DAC2001
- Wang-Vrudhula Mixed Design of Integrated
Circuits and Systems, 2001 - Now distributed by Anadigm
5Floating gate based FPAA
Floating gate PFET switch
Computational Analog Block (CAB) components
2D array of CABs
6Interconnect Analysis
- Three types of interconnects
- type1 intra-CAB
- type2 inter-CAB, intra-column
- type3 inter-CAB, inter-column
- Clustering determines type1 vs. types 23
- Clustering maximizes type1 use
- Vertical/horizontal wires are not segmented
(unlike FPGA)
R 10 kW (switch on resistance) Cx S (all
switch Cs on a line)
7Layout of a single CAB in FPAA
switch matrix
components
8Advantages of floating-gate based FPAA
- Larger scale
- More components per CAB
- More CABs per chip
- More component variety
- Floating gate PFET switch technology
- Non-volatile memory unit
- Programmable on resistance
- Linear Voltage-Current characteristics
9Analog Circuit Modeling
Extracting a directed graph from an analog circuit
10FPAA device modeling
- 88 FPAA and its graph based representation
- Small circles gt routing switches
- Large circles gt CABs
11Problem Formulation
- Objective
- Minimum number of CABs
- Minimum number of inter-CAB connections
- Constraints
- User constraints certain components have to be
in the same CAB - Device constraints each CAB can accommodate
certain number of components of each type - Net constraints each CAB can have a maximum
number of nets for intra-CAB and inter-CAB
connections
12Overview of FPAA Clustering
- Simple (but effective) greedy heuristic
- Pre-cluster user-defined components
- Order circuit components
- For each component in order
- Find the best CAB
- Merge the component CAB
- If no CAB available
- allow constraint violation
- fix it by adding more neighbors
- Compute utilization
13FPAA Clustering Algorithm
- 1. Determine constrained groups
- 2. Modified Hyper Edge Coarsening (MHEC) ordering
- 3. Assign groups/components to the best available
CABs - i. High priority (scarce) components
- ii. User defined groups
- iii. Remaining components in MHEC ascending order
14How to select the best CAB?
- Check availability of the CAB
- Device constrains
- Net constraints
- If available, rank the CAB in favor of
- Resulting CAB occupancy
- Net increase in intra-CAB connections
- Net decrease in inter-CAB connections
- Select CAB with highest rank
15Inter-CAB Interconnect Reduction
cutsize before gt 6 nets after gt 5 nets
- If a component has too many connections to fit in
ANY CAB - Select CAB with smallest violation
- Look for components to reduce inter-CAB
interconnects - pkey number of nets NOT between component and
CAB - skey number of nets between component and CAB
- Pick the lowest pkey break ties with higher
skey
16Recent Progress
- FPAA clustering has been improved to include
net-driven, path-driven and a hybrid of
net/path-driven approaches - Net-driven minimizes inter-CAB connections
- Path-driven considers path length balance
- FPAA Placement has been implemented
17Experimental Setup
FPAA Architectures
benchmarks
- We cluster each circuit w/ four different cell
ordering methods - random, net-driven, net-path driven path-driven
18Results
19Conclusion
- We require low power reconfigurable analog
devices for signal processing applications - Floating gate based FPAA provides a large-scale
solution - We developed an algorithm for clustering
targeting floating gate based FPAA
20Future Work
- Complete FPAA Physical Synthesis Tool including
- Clustering
- Placement
- Routing
- Synthesize circuits gt measurements
- Elaborate FPAA switch vs wire analysis
- Optimal FPAA Architecture Selection
21 Thank you