TERAMAC A TECHNICAL VIEW

1
TERAMAC A TECHNICAL VIEW

• By Kwame Waikenda
• For CDA5155

2
Introduction

• What is Teramac
• Background in FPGAs and Configurable
• Teramac Design
• Applications
• Current Status
• Future

3
What is Teramac

• Tero means1012
• 106 logic elements 106 operations)
• Defect tolerant FPGA based custom computer
• Uses compiling to overcome defects

4
What is Teramac

• Idea by Rau and Schacleford. Kuekes PM. Berger
  designed hardware.
• 864- Plasma FPGAs
• 27 FPGAs per MCM
• 8 MCM(MultiChip Modules).
• Set up in1-16 printed circuit boards
• 8 Chips for LUTS(look Up tables.
• Look up 6 in-2 out

5
FPGAs and custom computing

• Can implement any combinatorial function as a
  logic table
• Look Up a line(given inputs)

6
Field Programmable Gate Arrays

• SRAM is typically set up in factory.
• DRAM is registers requires refresh.
• EEPROM/FPGA, is just a massive list of memory
  locations.

7
Plasma FPGA

• Custom designed for Teramac
• 6 input 2 output lookup tables
• Compile time 3 seconds

8
Teramac Design

• Has 64-Bit LUTs
• Each LUT has 10 logic gates
• Total of 65536 LUTs
• Configuration memory
• Use 30 Mbit VLIW for addressing

9
Teramac Design

• 1,000,000 gate capacity
• Upto 1 MHz clock rate
• .5 gigabytes of memory
• Automatic compilation
• From 1 to 16 boards

10
Teramac

• Defects
• 10 of logic cells in FPGAs
• 10 of interchip signals unreliable
• Out of 7,670,000 resources 3 are defective

11
Teramac Design

• Defect Tolerance is key
• Rents rule for n gates need O(n1/2) at boundary
• Thus need to have 38,000 signals in 16 board and
  6000 signals in MCMs,

12
Finding defects

• Testing uses the idea of isolation
• Check a row see what passes what fails,
• Then do same for columns
• Map everything onto a database of defects
• When compiling simply ignore known defects.

13
Finding defects
14
Compiling

• A number of Different ways
• Initially the Tsutsuji Logic Description
  Format-Text based
• VHDL Design by Dr. Brent Nelson at BYU.

15
Compiling

• Several compiler passes
• Netlist
• Merger
• Global Partitioning and placing/routing
• Local placing and routing
• Configuration mapper to Teramac bitstream

16
Applications

• Nanotechnology
• Volume viewing/ massively parallel functions.
• For(I1Ilt1000I)
• XIxIyI
• Pi 120 digit pi engine can run at 500MHz

17
Performance

• Oft quoted figure is 100 times conventional at
  1Mhz.
• Dr. A. Berger says didnt achieve it
• Dr. Stan Williams(HP) helped me contact Dr.
  Keuekes/Project Manager
• No reply from Dr. Kuekes

18
Performance

• Using the cube volume rendering program
• 8 seconds from C on 250Mhz machine
• 3 hr 21 min from VHDL on 100MHz workstation
• 2.9 seconds on 1 MHz Teramac

19
Current status

• Not in further development
• 2 Teramacs Held by Professor Brad Hutchings at
  Brigham Young University
• 1 board and 8 board machine
• Used for configurable computing lab

20
Future

• IBM Blue Gene
• 100million project
• 1 quadrillion operations per second (Petaflops)
• Faster than top 500 supercomputers
• Still very much in development
• Study protein folding

21
Conclusion

• Covered
• FPGAs
• Teramac
• Custom computing
• Nanotech future

22
References contd

• Amerson, R. Carter, R.J. Culbertson, W.B.
  Kuekes, P. Snider, G. Teramac-configurable
  custom computing. FPGAs for Custom Computing
  Machines, 1995. Proceedings. IEEE Symposium on ,
  1995. Page(s) 32 -38
• Michael Rencher. A comparison of FPGA platforms
  through SAR/ATR algorithm implementation.
  Master's thesis, Department of Electrical and
  Computer Engineering, Brigham Young University,
  Provo, Utah, 1996.
• Quddus, W. Configuration Self-Test in FPGA-Based
  Reconfigurable Systems," Masters Thesis, Dept. of
  ECE, University of Texas at Austin, May 1999.
• IBM. IBM Blue Gene. http//www.aip.org/pt/vol-53/i
  ss-10/p106b.html
• Feng, Yun The Design and Implementation of a
  200k-gate Reconfigurable Computing System. Proc.
  International Symposium on Advanced Research in
  Asynchronous Circuits and Systems. (1997)

23
References

• Clark, D. Teramac pointing the way to real-world
  nanotechnology. IEEE Computational Science and
  Engineering , Volume 5 Issue 3 , July-Sept.
  1998 Page(s) 88 -90
• Culbertson, W.B. Amerson, R. Carter, R.J.
  Kuekes, P. Snider, G. Defect tolerance on the
  Teramac custom computer. Field-Programmable
  Custom Computing Machines, 1997. Proceedings.,
  The 5th Annual IEEE Symposium on , 1997 Page(s)
  116 -123
•  Culbertson, W.B. Amerson, R. Carter, R.J.
  Kuekes, P. Snider, G. Proceedings IEEE Symposium
  on FPGAs for Custom Computing Machines.
  Applications of Computer Vision, 1996. WACV '96.,
  Proceedings 3rd IEEE Workshop on , 1996
• Culbertson, W.B. Amerson, R. Carter, R.J.
  Kuekes, P. Snider, G. Exploring architectures
  for volume visualization on the Teramac custom
  computer. FPGAs for Custom Computing Machines,
  1996. Proceedings. IEEE Symposium on , 1996.
  Page(s) 80 88
• Allen, F. Blue Gene A vision for protein science
  using a petaflop supercomputer, IBM Systems
  Journal, Volume 40, Number 2, 2001, p. 310