Title: Instructor: Nachiket M' Kharalkar
 1Introduction to Microcontrollers
- Instructor Nachiket M. Kharalkar 
 -   
 - Lecture 2 
 - Date 06/04/2007 
 - E-mail knachike_at_ece.utexas.edu 
 -  
 
  2Todays Agenda
- Things to buy 
 - Recap 
 - Arithmetic operations 
 - Promotion, Ceiling  Floor    
 - Overflow, drop-out, truncation  roundoff 
 - 9S12C32 architecture 
 - Few basic assembly language instructions   
 
  3Things to buy
- Simple digital multi-meter 
 - Wire strippers
 
  4Recap 
Store 03E8 in big and little/small endian format
Freescale Store MSB first
Intel Store LSB first
Store 12345678 
 5Number formats in TExaS 
-  h 8-bit unsigned hexadecimal 
 -  h 8-bit signed hexadecimal (h and -h are the 
same format)  -  d 8-bit unsigned decimal 
 -  d 8-bit signed decimal (d and -d are the same 
format)  -  b 8-bit unsigned binary 
 -  b 8-bit signed binary (b and -b are the same 
format)  -  2d two unsigned decimal numbers 
 -  H 16-bit unsigned hexadecimal 
 -  H 16-bit signed hexadecimal (H and -H are the 
same format)  -  D 16-bit unsigned decimal 
 -  D 16-bit signed decimal (D and -D are the same 
format)  -  B 16-bit unsigned binary 
 -  B 16-bit signed binary (B and -B are the same 
format) 
  6MC9S12C32  16-Bit Microcontroller
- 16-bit HCS12 CPU 
 - Multiplexed External Bus 
 - 32K byte Flash EEPROM 
 - 2.0K byte RAM 
 - 8-channel Analog-to-Digital Converter, 10-bit 
resolution  - 1M bit per second, CAN 2.0 A, B software 
compatible module  - 8 channel 16-bit timer module 
 - 6-channel 8-bit Pulse Width Modulator
 
  79S12C32 registers 
 8Condition code register (CC or CCR)
 C set after an unsigned add if the answer is 
wrong V set a signed add if the answer is wrong 
 Why do we care about these bits? 
 9Unsigned number wheel
22464 
9664
C bit Set
C bit Cleared
 The carry bit, C, is set after an unsigned 
addition or subtraction when the result is 
incorrect. 
 10Trick
Whenever you directly add 2 unsigned 8-bit 
numbers and the answer is more than 255, C bit is 
SET. The final answer is obtained by subtracting 
256 from the direct addition. For example 255 
 5  260, C  1 and the actual answer is 260-256 
 4 
 11Unsigned number wheel
32-64 
160-64
C bit Cleared
C bit Set
The carry bit, C, is normally set when we cross 
over from 255 to 0 while adding or cross over 
from 0 to 255 while subtracting. 
 12Trick
 Whenever you directly subtract 2 unsigned 8-bit 
numbers and the answer is negative, C bit is SET. 
The final answer is obtained by adding 256 to the 
direct subtraction. For example 5 - 255  
-250, C  1 and the actual answer is -250256  6 
 13Signed number wheel
9664 
-3264
V bit Cleared
V bit Set
The overflow bit, V, is set after a signed 
addition or subtraction when the result is 
incorrect. 
 14Signed number wheel
-96-64 
32-64
V bit Cleared
V bit Set
The overflow bit, V, is normally set when we 
cross over from 127 to -128 while adding or cross 
over from -128 to 127 while subtracting. 
 15Addition summary
- Let the result R be the result of the addition 
AB.  - N bit is set 
 -  if unsigned result is above 127 or 
 -  if signed result is negative. 
 -  N  R7 
 - Z bit is set if result is zero 
 - V bit is set after a signed addition if result is 
incorrect  -  V  
 - C bit is set after an unsigned addition if result 
is incorrect  -  C  
 
  16Subtraction summary
- Let the result R be the result of the addition 
A-B.  - N bit is set 
 -  if unsigned result is above 127 or 
 -  if signed result is negative. 
 -  N  R7 
 - Z bit is set if result is zero 
 - V bit is set after a signed subtraction if result 
is incorrect  -  V  
 - C bit is set after an unsigned subtraction if 
result is incorrect  -  C  
 
  17P1
When you perform (32  129) in an 8-bit system 
what is the status of the NZVC bits? Answer  
159 NZVC  1011 
 18Unsigned promotion
-  Promotion involves increasing the precision of 
the input numbers, and performing the operation 
at that higher precision  - decimal 8-bit 16-bit 
 -  224 1110,0000 0000,0000,1110,0000 
 -   64 0100,0000 0000,0000,0100,0000 
 -  288 0010,0000 0000,0001,0010,0000
 
  19Unsigned ceiling  floor 
 20Signed promotion
To promote a signed number, we duplicate the sign 
bit decimal 8-bit 16-bit 
-96 1010,0000 1111,1111,1010,0000 - 
64 -0100,0000 -0000,0000,0100,0000 -160 
 0110,0000 1111,1111,0110,0000 
 21Signed ceiling  floor 
 22Common errors
- Overflow result exceeds the range of number 
system  - promotion and ceiling/floor. 
 - Drop-out occurs after an integer right shift or a 
divide  - intermediate result looses the information 
 - divide last when performing multiple calculations 
 - 100(N/51) ? (100N)/51
 
  23Common errors
- Roundoff is the error that occurs as a result of 
an arithmetic operation. discarding the least 
significant bits of the product  - multiplication of two 64-bit mantissas yields a 
128-bit product.  - Roundoff during addition and subtraction 
 - two n-bit numbers are added the result is n1 
bits  - Truncation is the error that when a number is 
converted from one format to another.  - For example when a real number is converted to a 
short real format 
  24- Architecture defines how the various computer 
components are connected.  - The 6812 has a von Neumann architecture (I/O 
devices are connected to the processor in a 
manner similar to memory).  
  25The term von Neumann architecture (memory mapped 
I/O) refers to a computer design model that uses 
a single storage structure to hold both 
instructions and data. 
 26In an Isolated I/O system, the control bus 
signals that activate the I/O are separate from 
those that activate the memory devices 
 279S12C32 
 28http//www.technologicalarts.com/myfiles/jpeg/9s12
c32block.jpg 
 294 basic components of a 6812 processor 
 30Bus interface unit (BIU)
- The bus interface unit (BIU) 
 -  reads data from the bus during a read cycle, 
 -  writes data onto the bus during a write cycle. 
 -  always drives the address bus and the control 
signals  -  effective address register (EAR) contains the 
data address  
  31Control unit (CU)
- The control unit (CU) 
 - orchestrates the sequence of operations 
 - issues commands to ALU, BIU 
 - instruction register (IR) contains the op code
 
  32Registers
- The registers 
 - high-speed storage devices located in the 
processor  - do not have addresses like regular memory 
 - specific functions explicitly defined by the 
instruction  - Accumulators contain data (A, B, D) 
 - Index registers contain addresses (X, Y) 
 - Program counter (PC) points to instruction to 
execute next  - Stack pointer (SP) points to the top element on 
the stack  - context switch when calling and returning from a 
function  - pass parameters 
 - save temporary information 
 - implement local variables 
 - Condition code register (CCR) the status of the 
previous operation 
  336812 has 6 registers 
 34Condition code register (CCR) 
 35Arithmetic logic unit (ALU)
- The arithmetic logic unit (ALU) 
 - Arithmetic operations 
 - Addition 
 - Subtraction 
 - Multiplication 
 - Division 
 - Logic operations 
 - And 
 - Or 
 - Exclusive or 
 - Shift 
 
  36Memory map of 9S12C32 
 37Basic 8-bit load instructions 
- The 8-bit load instructions 
 -  ldaa w RegAw 
 -  ldaa U RegAU 
 -  ldab w RegBw 
 -  ldab U RegBU 
 - Condition code bits are set 
 - N result is negative NR7 
 - Z result is zero 
 - V signed overflow V0
 
  38Basic 8-bit store instructions 
- The 8-bit store instructions 
 -  staa U URegA 
 -  stab U URegB 
 - Condition code bits are set 
 - N result is negative NR7 
 - Z result is zero 
 - V signed overflow V0
 
  398-bit addition
- These instructions work for both signed and 
unsigned data.  -  adda w RegARegAw 
 -  adda U RegARegAU 
 -  addb w RegBRegBw 
 -  addb U RegBRegBU 
 - Condition code bits are set after RXM, 
 - N result is negative NR7 
 - Z result is zero 
 - V signed overflow 
 - VX7M7not(R7)not(X7)not(M7)R7 
 - C unsigned overflow 
 - CX7M7M7not(R7)not(R7)X7
 
  408-bit subtraction
- These instructions work for both signed and 
unsigned data.  -  cmpa w RegA-w 
 -  cmpa U RegA-U 
 -  cmpb w RegB-w 
 -  cmpb U RegB-U 
 -  suba w RegARegA-w 
 -  suba U RegARegA-U 
 -  subb w RegBRegB-w 
 -  subb U RegBRegB-U 
 -  tsta RegA-0 
 -  tstb RegB-0 
 - Condition code bits are set after RX-M 
 - N result is negative NR7 
 - Z result is zero 
 - V signed overflow 
 - VX7not(M7)not(R7)not(X7)M7R7 
 - C unsigned overflow