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CS231 Spring 07 Review Session

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Title: CS231 Spring 07 Review Session


1
CS231 (Spring 07)Review Session
  • Sangkyum Kim
  • April 20, 2007

2
Outline
  • Administrative Information
  • ROM
  • PLA
  • Datapath
  • ISA

3
Administrative Information
  • HW9
  • Due 4/23 Mon 500 pm, TA office(SC 0212)
  • HW10
  • Contains big LogicWorks Problem
  • Final Exam
  • Time 5/9 Wed 7-10pm
  • Place SC 1404
  • Contents All

4
Outline
  • Administrative Information
  • ROM
  • PLA
  • Datapath
  • ISA

5
Read-Only Memory
  • You can think of a ROM as a combinational circuit
    that takes an address as input, and produces some
    data as the output.
  • You cant store arbitrary data into a ROM, so the
    same address will always contain the same data.

6
ROM Table
  • You can think of a ROM as a combinational circuit
    that takes an address as input, and produces some
    data as the output.
  • A ROM table is basically just a truth table.
  • The table shows what data is stored at each ROM
    address.
  • You can generate that data combinationally, using
    the address as the input.

7
ROM Setup
8
23 x 3 ROM Example
A2 A1 A0
V2 ?m(1,2,3,4) V1 ?m(2,6,7) V0 ?m(4,6,7)
9
(Quiz ROM) Question 1
  • A ROM is to be used to implement a binary
    multiplier that multiplies two unsigned 7-bit
    numbers. Specify the size of the ROM by giving
    the number of words and the number of bits per
    word.
  • Number of words
  • Number of bits per word

214 16384
14
10
(Quiz ROM) Question 3
  • A 256 x 12 ROM is to be constructed using eight
    ROM chips with enable and a 3-to-8 decoder. What
    size ROM chips are needed?
  • Number of words
  • Number of bits per word

28 / 8 28-3 32
12
11
Outline
  • Administrative Information
  • ROM
  • PLA
  • Datapath
  • ISA

12
Programmable Logic Arrays
  • A programmable logic array, or PLA, makes the
    decoder part of the ROM programmable too.
    Instead of generating all minterms, you can
    choose which products (not necessarily minterms)
    to generate.

A2 A1 A0
V2 V1 V0
13
3 x 4 x 3 PLA Example
A2 A1 A0
V2 V1 V0
14
Regular K-map minimization
V2 V1 V0
V2 ?m(1,2,3,4) V1 ?m(2,6,7) V0 ?m(4,6,7)
15
PLA minimization
V2 xyz xz xyz V1 xyz xy V0
xyz xy
V2 ?m(1,2,3,4) V1 ?m(2,6,7) V0 ?m(4,6,7)
16
A2 A1 A0
xyz
xy
xz
xyz
V2 V1 V0
17
PLA Question
  • Suppose you wish to use a PLA to implement the
    two functions f and g, where
  • f(x,y,z) OR(m2,m4,m5,m7) g(x,y,z)
    OR(m1,m7)
  • What is the minimum number of product terms you
    will need?
  • List the product terms

4
x'yz', xy', xyz, x'y'z
18
Outline
  • Administrative Information
  • ROM
  • PLA
  • Datapath
  • ISA

19
What is Computer Architecture?
Computer Architecture is the science and art of
selecting and interconnecting hardware components
to create computers that meet functional,
performance and cost goals. Computer architecture
is not about using computers to design
buildings. -- http//www.cs.wisc.edu/arch/www/
20
Two Parts (1) Microarchitecture
  • Microarchitecture
  • Consist of a set of microprocessor design
    techniques, including instruction set, microcode,
    pipelining, cache systems, etc.

21
Two Parts (2) System Architecture
  • System architecture
  • How to organize a chuck of hardware resources
  • Spread from mobile computing, PC to mainframe
  • Include microprocessor, memory, I/O, operating
    system, networking, distributed system, security,
    dependability and so forth.

22
What is after CS231?
  • CS231 Computer Architecture I
  • Basic course on computer architecture
  • CS232 Computer Architecture II
  • Second-level course on Computer architecture
  • (1) instruction set architecture (ISA), (2)
    pipelining, (3) memory hierarchy, (4)
    input/output hardware and software
  • CS433 Computer System Organization (UG/G)
  • A must take course on computer architecture
  • cover ISA design, pipeline design, memory
    hierarchy and so forth
  • CS533 Parallel Computer Architecture
  • Theoretical aspects of parallel and pipeline
    computation

23
CPU Design
  • CPU design is extremely complex, fortunately
    however, this course will only introduce some
    basic concepts.
  • Datapath how does the data flow in a CPU
  • Instruction set programmers language to a CPU
  • Control unit how does CPUs control the
    operations.

24
Datapath - Overview
  • Fundamentally, the processor is just moving data
    between registers, possibly with some ALU
    computations.
  • Actually, within a CPU, the data may also flow
    through cache, which is a part of the memory.
  • Temporarily forget about what you learned before
    in CS231 .
  • How do these components work ? What are they
    doing?

Memory
CPU
25
Datapath - Registers
  • Register is the fastest and smallest storage
    component in a computer.
  • Register file contains several registers.
  • Only one control bit - WR.
  • Remember the notation of size 2k x n
  • We can read two value from the register file
    at once and write one value to it at once
  • Any operation happens only on the positive
    edge of the clock.
  • If possible, try to know the inside of the
    register file.

26
Datapath - CPU
  • ALU is a key component in a CPU.
  • No address line for ALUs.
  • Output some status bits.
  • The function select FS has more than one bit.

27
Datapath - Register ?? ALU
  • R0 ? R1 R3
  • This instruction needs two cycles
  • Calculate R1R3 in ALU
  • Put the result back to R0
  • Be familiar with this kind of diagram.

28
Datapath all together
  • Blue Add constant operator
  • Red Add memory access

29
Outline
  • Administrative Information
  • ROM
  • PLA
  • Datapath
  • ISA

30
A Programs Life (1) High-level language
int A10 int i0 int j1
int k0 while (Ai k) i i j
  • In todays world, usually programs are written
    by high-level programming languages
  • They provide easy-use loop statements,
    conditional branch statements, plenty of data
    types, sub-routine mechanism and so forth.
  • Also, modern programming languages
    provideOO-Programming, memory safe scheme,
    luxuriouslibraries.
  • They are easy to use. They can let programmers
    pay more attention to the programs design.
  • A lots of languages are there.
  • They are very low machine-specific.

Machines cannot understand!
31
A Programs Life (2) Assembly language
0 lw 1, 0, i 1 lw 2, 0, j 2
lw 3, 0, k 3 loop lw 4, 1, A 4
beq 4, 3, 1 5 beq 0, 0, exit 6
add 1, 1, 2 7 beq 0, 0, loop 8
exit halt 9 i .fill 0 10
j .fill 1 11 k .fill 0 12 A
.fill 0 13 .fill 0 14 .fill 0 15
.fill 0 16 .fill 0 17 .fill 0 18
.fill 0 19 .fill 0 20 .fill 0
21 .fill 0
  • Then, the program becomes assembly codes
  • These instructions are a sub-set of the
    instruction set of a specific machine.
  • Highly machine-specific.
  • Hard to understand.
  • Only a few programmers who involve hardware
    programming need to use it directly.

How can we transfer the high-level language into
assembly codes? Compiling
32
A Programs Life (3) Machine language
0 100 001 000 0001001 1 100 010 000
0001010 2 100 011 000 0001011 3 100 100 001
0001100 4 110 100 011 0000001 5 110 000 000
0000010 6 000 001 001 0000 010 7 110 000 000
1111011 8 011 0000000000000 9
0000000000000000 10 0000000000000001 11
0000000000000000 12 0000000000000000 13
0000000000000000 14 0000000000000000 15
0000000000000000 16 0000000000000000 17
0000000000000000 18 0000000000000000 19
0000000000000000 20 0000000000000000 21
0000000000000000
  • Finally, the machine language code is generated
  • Computers become happy ?
  • Human beings become sad ?
  • Almost onbody can read it smoothly
  • Each assembly instruction has one corresponding
    instruction in machine language.

How can we transfer assembly codes into the ugly
01-strings? Instruction encoding
33
Instruction Set - Overview
  • Instruction set is specific to the processor
  • Instruction set is closely related to the
    processor design.
  • A high-level language program must be
    translatedinto low-level instruction.
  • Instruction set is hard to design, a lot of
    trade-offsand complex considerations.

34
Instruction Set - Overview
  • Instruction set is specific to the processor
  • Instruction set is closely related to the
    processor design.
  • A high-level language program must be
    translatedinto low-level instruction.
  • Instruction set is hard to design, a lot of
    trade-offsand complex considerations.

35
Assembly Instructions
  • In CS231, you should be familiar with a small set
    of assembly instructions.
  • Data manipulation instructions (ADD, R0, R1, R2)
  • Load instruction (LD R1, (R3))
  • Save instruction (ST (R3), R1)
  • Jump instruction (JMP label1)
  • Branch instructions (8 instructions)
  • Addressing mode
  • R0 ? Reg0 The value in Register 0
  • (R0) ? MemReg0 The value in of the memory
    byte with address Reg0
  • 1000 ? 1,000 A simple integer.
  • 1000 ? Mem1,000 The value of the memory
    byte with address as 1,000
  • Know how to compile simple c-code

36
Compiling Example
  • Here is a translation of the for loop

37
THANK YOU!
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