Beambased feedback and feedforward

1
Feedback On Nanosecond Timescales (FONT)

• Beam-based feedback (and feed-forward)
• systems for the International Linear Collider
• Philip Burrows
• John Adams Institute
• Oxford University
• Tony Hartin, Glenn Christian, Glen White
• Hamid Dabiri Khah, Colin Perry
• Christine Clarke, Christina Swinson, (Steve
  Molloy)

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Beam stability requirements at ILC

• Relative component displacement -gt
• emittance blowup (linac, BDS)
• mis-steering (FF), esp. final quads
• static effects
• misalignments
• diffusive effects
• settling, hydrology
• ambient drifts
• temperature, pressure
• seismic motion
• earthquakes, ocean waves
• cultural/facilities noise
• traffic, pumps, water flow

Luminosity vs. beam offset
50nm 80 lost
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Example of measured motion at SLAC
O(100 nm) r.m.s. motion at ILC rep. rate
Plan to fix motion such as this in ILC with
INTRA-TRAIN beam-based feedback
SLD/SLC
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Intra-train feedback concept
Implementation in ILC Interaction region
Measure early bunches, correct later bunches in
SAME train
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Intra-train feedback simulations
OPTIMAL LUMINOSITY
y angle scan
y position scan optimise signal in pair monitor
y position FB restore collisions within 100
bunches
1 seed post-BBA GM wakes
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FONT goals
Prototype components required for ILC intra-train
beam feedback system(s) BPMs, signal
processor, feedback circuit, amplifier, kicker
and demonstrate system performance with real
beam NB technology applicable more widely
through ILC RTML feed-forward, linac orbit FB,
linac train straightener, BDS orbit FB, IP
pulse-pulse FB
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Feedback experiments
Kicker
BPM 1
BPM 2
BPM 3
e-
BPM processor
Drive amplifier
Feedback
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FONT prototype intra-train feedback systems

• NLCTA 65 MeV beam, 170ns train, 87ps bunch
  spacing
• FONT1 (2001-2)
• First demonstration of closed-loop FB latency
  67ns
• 10/1 beam position correction
• FONT2 (2003-4)
• Improved demonstration of FB latency 54ns
• real time charge normalisation with logarithmic
  amplifiers
• beam flattener to straighten train profile
• solid-state amplifier
• ATF 1.3 GeV beam, 56ns train, 2.8ns bunch
  spacing
• FONT3 (2004-5)
• Ultra-fast demonstration of FB latency 23 ns
• 3 stripline BPMs
• high-power solid-state amplifier

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FONT2 beamline at SLAC NLCTA
Dipole and kickers
BPMs
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FONT2 position correction performance
Beam starting positions
beam start
beam end
Beam flattener on
Feedback on
1
2
3
4
Delay loop on
Latency 54ns
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FONT3 beamline installation at KEK ATF
BPM processor board
FEATHER kicker
Amplifier/FB board
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FONT3 position correction performance
56ns bunchtrain
200um
FB on
23ns
FB delay loop on
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ILC intra-train feedback system

• 3000 bunches per train
• Bunch spacing 300 (possibly 150) ns
• -- allows digital FB processor approach
• Development of robust algorithms critical
• Use of bunch-by-bunch luminosity signal into fast
  scan system

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Digital feedback scheme
Kicker
BPM 1
BPM 2
BPM 3
Analogue BPM processor
Drive amplifier
Digital feedback
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Digital system test plan

• FONT4 (2005-6)
• modified FONT3 BPM processor
• digital FB processor
• solid-state amplifier
• adjustable-gap kicker
• ATF initial tests with
• 3 bunches with spacing c. 150ns
• aiming for latency lt120ns (electronics)
• stabilisation of 3rd bunch at um level
• Digital board tests April 2006
• Closed-loop tests June/Dec 2006
• FONT5 (2007-9)
• improved FB system algorithm development
• tests with 20-60 bunch trains at ATF(2), or
  TTF2

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FONT4 BPM processor
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FONT4 Digital FB Processor Module
RAM
Flash/ EEPROM
JTAG circuit
JTAG connector
DAC
DAC
UART circuit
FPGA
Serial connector
ADC
Differential To single
ADC
Differential To single
USB circuit
USB connector
ADC
Differential To single
Clock circuit
ADC
Differential To single
IN Power Jack switch
5v
2.5v
? v
3.3v
Latency goal 70ns
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FONT4 latency budget

• Time of flight kicker BPM 7ns
• Signal return time BPM kicker
  15ns
• Irreducible latency
  22ns
• BPM processor
  7ns
• ADC/DAC (3.5 89 MHz cycles) 40ns
• Signal processing (8 357 MHz cycles) 25ns
• FPGA i/o 3ns
• Amplifier
  40ns
• Kicker fill time 3ns
• Electronics latency
  118ns
• Total latency budget
  140ns

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Digital system test plan (contd.)

• ILC robust feedback algorithm development/testing
  
• Dedicated test lab being set up in Oxford
• fast impulse generator for simulation of beam
  signal
• analogue front-end digital board
• fast scope for DAQ
• -gt bench test complete FB system/algorithms
• We are responsible for BDS beam-based FB system
  design in ILC RDR! Being asked to think about
  linac FB and RTML FF also

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Beam stabilisation at ATF2
Goal A 35nm spot size Jitter lt 30 sigma_y
-gt few um stability at ATF2 FF entrance Goal
B control of beam position at nm level Jitter lt
5 sigma_y -gt better than 1 um stability at
ATF2 FF entrance
Fast jitter 5 micron amplitude
M.Ross et.al., ATF-03-05
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EM Background Environment for FB BPM
Energy deposition on mask
Create using ESA spray beam for experimental
test
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SLAC ESA Spray Beam Experiment

Aiming for 1st beam test July 2006
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Summary

• FONT group transferred to John Adams
• Leading fast beam-based feedback development for
  ILC
• Testing prototype FB system hardware at KEK, SLAC
• Building up FB test lab in Oxford
• Expertise widely applicable in accelerator
  science