Mextram

1
Mextram

• Overview
• Summary of the TU Delft investigation on the
  Mextram (non-)convergence in simulators.
• Pending proposals for the model extension.
• Annoncements

2
Convergence in Simulators

• Problem History
• TU-Delft test environment
• Test results
• Conclusions

3
Problem History

• Intersil has reported the convergence related
  Mextram problem ( Q1 2005) non-convergence and
  difficult to achieve convergence in combination
  particular Intersil circuit case Mextram 504
  (SimKit implementation) commercial circuit
  simulator (Sim A).
• In order to practically demonstrate the reported
  problem Intersil has formulated a simplified test
  case (circuit of 205 nodes, 88 Mextram npn and
  pnp transistors, 9 capacitors, 67 resistors, 8
  current sources, and 8 voltage sources subjected
  to a transient analysis followed by a DC-OP
  analysis). The test case has been offered to TU
  Delft under NDA for investigation. It is referred
  as Intersil-1 test case in the sequel.
• Q3 2005 Santa Barbara The issue has been
  discussed at the pre-CMC evening meeting (TU
  Delft, Intersil, Philips, Analog Devices, Texas
  Instruments).
• CMC meeting Q1 2006 status first test results
  presented.
• Phone CMC meeting (April 2006) New comprehensive
  testing results of TU Delft has been analyzed and
  various irrelevant issues has been eliminated.
  With the permission Intersil, the test case
  Intersil-1 has been distributed to some other CMC
  members (Ansoft, Philips, Cadence). Cadence
  offered and sent to TU Delft a single transistor
  test example based on Intersil-1, referred in the
  sequel as Intersil-2.
• Q2 2006 CMC meting in Boston (present)

4
TU Delft Testing Environment
Netlist translated
Test Case
Sim B
Sim C
Sim A
bjt504t
Parameters re-extracted
SimKit
Internal built-in
Verilog-A
Linux PC
HP Unix Workstation
5
Intersil-1 (Non-Converging Cases)

• The DC-OP analysis alone is converging in all
  tests.
• The transient analysis ( default OP) is
  converging in all tests.
• The combination transient-DC is converging in all
  cases for Sim B and C. It converges also in all
  cases for Sim A if self-heating is excluded.
• The occasional non-convergence has been observed
  only in several test cases involving the
  particular combination mxt(d)504t-SimKit-Sim
  A-(transient precedes DC-OP).It seems that the
  TR analysis in Sim A affects the initial solution
  for the following forced DC-OP analysis.
• Specifying explicitly what should be used as an
  initial solution eliminates also this special
  non-converging case.

6
Test Case Intersil-1 (Simulation Efficiency)
Sim A
Sim B
Sim C
7
Intersil-1 Simulation Efficiency

• The number of iterations is varying in the wide
  range for different simulators, model complexity,
  model implementation and computer platforms.
• Employment of the non-standard Newton solving
  approaches (pseudo-transient, continuation
  techniques, etc.) seems to be essential to
  guaranty the convergence and reduce extremely
  large iteration counts..
• Large number of iterations in some cases
  represent cumulative effort of several
  continuation quasi-Newton approaches
  (particularly Sim B). Forcing the
  pseudo-transient solving procedure in Sim B
  brings the number of iteration comparable to that
  achieved with Sim A and Sim C.
• The analysis shows that the OP can be solved in
  an average of 300 iteration. Sim C shows quite
  consistent results in that respect with both
  Verilog-A and internal model implementation.

8
Simple Example
Newton correction
First step
50 iterations
9
Test Case Intersil-2 Proposed by Cadence
10
Intersil-2 Test Case
Model
11
Simulation Results
12
Conclusions

• The iteration count of 300 for Intersil-1 is
  reasonable having in mind that the solvers (or
  model) are imposing the control (limitation) on
  the correction steps (pseudo-transient,
  continuation, etc.).
• The main question is to what extent the model
  should be involved in the Newton correction step
  selection procedure since it could interfere with
  the solvers step control strategies.
• In Verilog-A the step control is left to limexp
  function restricted to the code outside condition
  statements. The convergence control depends on
  the implementation of the limexp function and the
  actions taken by the simulator.
• The test case Intersil-2 is not about the control
  of the Newton correction . It seems to is reflect
  the implementation of the diode-like model
  elements at extremely forward biasing.

13
Pending Proposals for the Modeling
Extensions

• Reverse BE junction tunneling current.
• Splitting the extrinsic BC injection diode.

14
Reverse BE Junction Tunneling Currents
15
Parameter Extraction
16
Temperature Scaling
17
Intrinsic base-collector reverse base current
There have been suggestions to rename the
parameter that defines the spliting. We are open
for suggestions.
18
Announcements

• The Mextram model implementation in Verilog-A is
  available since Q1 CMC Meeting at SourceForge web
  site http//sourceforge.net/projects/mextram