Liquid Cooling for Wide Bandgap Semiconductor Technology

1
Liquid Cooling for Wide Bandgap Semiconductor
Technology

• Dr. Ceber Simpson
• Advanced Liquid Cooling Workshop
• 13 May 2003

2
Overview

• WBG semiconductor technology
• Potential applications
• Liquid cooling for integration/packaging of WBG
  devices
• Status of WBG semiconductor technology
• Technology maturity

CTS 11 April 2003
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• WBG Semiconductor Technology

CTS 8 May 2003
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WBG Semiconductor Technology

• Superior physical properties of WBG
  semiconductors (e.g., SiC, GaN) versus Si
• Lower intrinsic carrier concentration (10 - 35
  orders of magnitude)
• Higher electric breakdown field (4 - 20x)
• Higher thermal conductivity (3 - 13x)
• Larger saturated electron drift velocity (2 -
  2.5x)

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WBG Semiconductor Technology

• Properties of WBG semiconductors

•  

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Wide Bandgap High Power Electronics (HPE)
Simplified circuits and expanded capability
High Voltage (1-25 kV)
Smaller, lower loss, active and passive components
High Current Density (gt1kA/cm2)
High Duty Cycle (gt100 kHz)
Smaller cooling systems
High Temperature (gt250 C)
Silicon Carbide
Microsystems Technology Office
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• Potential Applications

CTS 8 May 2003
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WBG High Power Electronicsenabler for future
electric force
Electric Ship
More Electric Aircraft
All Electric Combat Vehicle (AECV)
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Potential GaN Applications
Circuit Technology
Gate Length
0.7 0.4 mm
0.25 0.15 mm
0.1 mm
Ship Radar
Modules Free Space Combining
Airborne Radar
Base Station
Decoy
Shipboard Radar
Satcom
Flip-Chip IC
Missile Seekers
VSAT
Satcom MMDS
Base Station Driver Amp
MVDS
On Wafer Device
LMDS
Digital Radio
CAR
from R. T. Kemerley, H. B. Wallace and M. N.
Yoder, Impact of Wide Bandgap Microwave Devices
on DoD Systems Proc. IEEE 90, 1059 (June 2002)
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• Liquid Cooling for Integration/ Packaging of WBG
  Devices

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Liquid Cooling for Integration/ Packaging of WBG
Devices
CTS 28 April 2003
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Liquid Cooling for Integration/ Packaging of WBG
Devices
Active Packaging DT Lower Fewer Interfaces
System Complexity/Reliability
Maintenance Procedures Cost
Traditional Packaging DT Higher Interface Losses
Accumulate
Active Surface Cooling
Die
Shim
Package/ Interconnect/Interfaces
Thermal Spreading
Application Heat Sink
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Active Cooling Technologies

• Logistical support
• Materials availability and suitability
• Maintenance requirements
• Application impacts
• Interface to application heat sink
• System changes and impact
• Maintenance interface
• Repair/Routine maintenance impact
• Environmental constraints
• Effect on device/radar performance

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• Status of WBG Semiconductor Technology

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DARPA WBG Semiconductor Technology Initiative

• Thrust I RF/Microwave/Millimeter-wave
  Technology
• Thrust II High Power Electronics

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DARPA WBG STI Thrust I RF/Microwave/Millimeter-
wave Technology

• Enable new RF applications and capabilities
  through the development and exploitation of the
  material, device, and circuit properties of wide
  bandgap semiconductors. Specific goals include
  the demonstration of
• gt 100 mm semi-insulating, high quality substrates
  (Phase I),
• epitaxial material technologies with better than
  1 composition, thickness, and doping control
  (Phase I),
• (c) robust RF/analog devices with ft gt 150 GHz
  (Phase II),
• (d) microwave and mm-wave circuit demonstrations
  (3-35 GHz) (Phase III), and
• (e) high power (gt 1kW/cm2) electronic integration
  assemblies (Phase III).

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DARPA WBG STI Thrust II High Power Electronics

• Revolutionize high power electrical energy
  control, conversion, and distribution by
  establishing a new class of solid state power
  switching transistors employing wide bandgap
  semiconductor materials. Specific goals include
  the demonstration of
• 75 mm diameter conducting, low defect, SiC
  substrates (Phase I),
• thick epitaxy (150 mm) with controlled low (1014
  cm-2) doping with lt5 variation in thickness and
  doping (Phase I),
• 5 kV and 50 A power unipolar switches (Phase II),
  
• 15 kV and 50 A power bipolar switches (Phase II),
  
• 150 kHz high power switching and prototype
  circuits (Phase II),
• integrated power control (Phase III), and
• high voltage/power packaging with gt1 kW/cm2
  thermal dissipation capability (Phase III).

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Program Plan
Phase I
Phase II
Phase I Go/No-Go
Phase II Go/No-Go
BAA for Phase II
Microsystems Technology Office
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• Technology Maturity

CTS 8 May 2003
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Technology Maturity
Packaging
SiC
GaN
6.1
6.3
6.2
EMRL 1
EMRL 2
EMRL 3
EMRL 4
TRL 1 TRL 2 TRL 3 TRL 4 TRL 5 TRL
6 TRL 7 TRL 8 TRL 9
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Contacts

• Chuck Pagel
• Naval Surface Warfare Center
• Code 8095, Bldg 3168
• 300 Highway 361
• Crane, IN 47522-5001
• Phone [phone]
• Email pagel_c_at_crane.navy.mil

• Ceber Simpson
• Naval Surface Warfare Center
• Code 6056, Bldg 3334
• 300 Highway 361
• Crane, IN 47522-5001
• Phone [phone]
• Email simpson_c_at_crane.navy.mil

CTS 11 April 2003