RapidFabricTM: The RapidIO Open Communications Fabric Initiative

1
RapidFabricTM The RapidIO Open Communications
Fabric Initiative

• Eran Strod
• RapidIO Marketing Manager
• Motorola Semiconductor
• Representing
• RapidIO Trade Association
• Marketing Working Group
• eran.strod_at_motorola.com

2
Next Interconnect Battleground?
Inside the Box
Box to Box

• Embedded
• Networking
• Storage
• Computing
• Desktop
• Server

1G/10G Ethernet
FibreChannel
Infiniband
ASI
PCI Express
HyperTransport
Proprietary
PCI/PCI-X
Processor Bus
Local I/O Bus
Backplane
System Area Network
Local Area Network
3
Introducing RapidFabric
Logical Specification
Global Shared Memory
Message Passing
Flow Control
DataStreaming
I/O System
Transport Specification
Common Transport
Physical Specification
HigherSpeed PHYs
8,16 Parallel
1x/4x Serial
AncillarySpecification
Interoperability
Error Management
Multicast
System Bring up
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RapidFabric Features

• Data Streaming Logical Layer
• Segmentation and reassembly
• 64Kb PDUs
• Fixed MTU size
• Efficient logical protocol for communications
• Start, continuation, end segments
• continuation has 20 bit header
• Interworking
• Ethernet, UTOPIA, SPI-3/4, CSIX, etc
• Virtual Streams
• Flow identification
• Traffic Management
• End-to-end Flow control
• Millions of streams
• 256 traffic classes

• Ancillary Extension
• Multicast
• Physical Layer Extensions
• Next Gen. PHYs
• Completed
• 3.125 GHz Serial Physical Layer
• 1X and 4X lanes
• Ratified 2001
• Flow Control Logical Extension
• Ratified Q3 2003

5
Comparing Interconnects
Interconnect Use
Characteristics
Ethernet
LAN/WAN (billions of end-points)
IPv4/IPv6, 48-bit MACaddress
Hundreds of classes, millions of flows,
end-to-end flow control, interworking
RapidIO
Fabric (50K end-points)
Message passing, architectural/ topological
independence, one flow, protocol tunneling
Switched Interconnect
ASI
PCIExpress
Serialized Input/Output Transactions/DMA
Serial Local Bus(10 end-points)
PCI-X
Parallel Input/Output Transactions/DMA
Parallel Local Bus
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Communications Fabric Requirements

• Architectural Independence
• Machine dependencies abstracted
• Supports any traffic/protocol
• Variable or fixed sized payloads
• Segmentation and reassembly of large PDUs
• Multicast
• Form Factors chip-to-chip, mezzanine, backplane
• Supports virtually any topology
• Star, Tree, Ring, Mesh, etc.
• End-point to end-point transaction support
• Easy to extend and scale
• Carrier Grade
• Reliable and robust
• Performance management
• Fault management

• Traffic Management
• Class of service (CoS)
• Support for thousands of flows
• Policing and shaping of flows
• Graceful degradation
• Performance
• Low hop latency
• Efficiency (i.e., ratio of header to payload)
• Throughput
• Scalable
• Support for thousands of end-points
• Multi-speed physical layers
• Striping
• Ecosystem Support
• Processors, DSPs, switches, IP, software, etc,
  ...

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Merchant Fabric Vendor Landscape
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Merchant Fabric Market
2003 Market Size 52M
Other
Source The Linley Group
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Total Fabric Market 2003 322M

• Factors influencing the migration to open
  standard fabrics
• RapidIO, ASI
• PICMG Standards
• System replacement cycle upswing
• Reduced Staff
• 90nm mask costs prohibitive
• Merchant silicon evolution

Proprietary 270M
Merchant52M
Source IDC
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Fabric Efficiency
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RapidFabric Roadmap

• Encapsulation/Interworking Q2 2004
• Traffic Management Q4 2004
• Product Announcements 2H 2004
• Products 2005
• Higher-Speed PHYs

Next RTA Briefing Motorola Smart Networks
Developer ForumApril 2004
12
Questions
Thank You
13

• Back-up

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A Basic Interconnect
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A Basic Fabric
Switch cards
Left Right
Compute Nodes

• Mercury PowerStream 7400
• 1 TeraFLOP for signal image processing
• 120 1GHz Motorola PowerPC 7447 processors
• Passive Backplane
• 24 processor modules
• 4 switch modules
• Maximum Bandwidth 75 GB/s aggregate

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Fabrics in Embedded Computing
Communications
Pervasive Computing
Data Plane
Control Plane
Signaling
Data
Logical
I/O System
Global Shared Mem
Message Passing
Flow Control
Data Streaming
Transport
Common Transport
Physical
Parallel
Serial
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Benefits by Logical Layer