Title: EE5342
1EE5342 Semiconductor Device Modeling and
CharacterizationLecture 25 - Spring 2004
- Professor Ronald L. Carter
- ronc_at_uta.edu
- http//www.uta.edu/ronc/
2Ideal 2-terminalMOS capacitor/diode
Vgate
conducting gate, area LW
-xox
SiO2
0
y
0
L
silicon substrate
tsub
Vsub
x
3Band models (approx. scale)
metal
silicon dioxide
p-type s/c
Eo
Eo
qcox 0.95 eV
Eo
qcSi 4.05eV
qfm 4.1 eV for Al
Ec
qfs,p
Eg,ox 8 eV
Ec
EFm
EFi
EFp
Ev
Ev
4Flat band condition (approx. scale)
Al
SiO2
p-Si
q(fm-cox) 3.15 eV
q(cox-cSi)3.1eV
Ec,Ox
qffp 3.95eV
EFm
Ec
Eg,ox8eV
EFi
EFp
Ev
Ev
5Equivalent circuitfor Flat-Band
- Surface effect analogous to the extr Debye length
LD,extr eVt/(qNa)1/2 - Debye cap, CD,extr eSi/LD,extr
- Oxide cap, COx eOx/xOx
- Net C is the series comb
COx
CD,extr
6Accumulation for Vgatelt VFB
Vgatelt VFB
-xox
SiO2
EOx,xlt0
0
holes
p-type Si
tsub
Vsub 0
x
7Accumulationp-Si, Vgs lt VFB
Fig 10.4a
8Equivalent circuitfor accumulation
- Accum depth analogous to the accum Debye length
LD,acc eVt/(qps)1/2 - Accum cap, Cacc eSi/LD,acc
- Oxide cap, COx eOx/xOx
- Net C is the series comb
COx
Cacc
9Depletion for p-Si, Vgategt VFB
Vgategt VFB
-xox
SiO2
EOx,xgt 0
0
Depl Reg
Acceptors
p-type Si
tsub
Vsub 0
x
10Depletion forp-Si, Vgategt VFB
Fig 10.4b
11Equivalent circuitfor depletion
- Depl depth given by the usual formula xdepl
2eSi(Vbb)/(qNa)1/2 - Depl cap, Cdepl eSi/xdepl
- Oxide cap, COx eOx/xOx
- Net C is the series comb
COx
Cdepl
12Inversion for p-SiVgategtVThgtVFB
Vgategt VFB
EOx,xgt 0
e- e- e- e- e-
Acceptors
Depl Reg
Vsub 0
13Inversion for p-SiVgategtVThgtVFB
Fig 10.5
14Approximation conceptOnset of Strong Inv
- OSI Onset of Strong Inversion occurs when ns
Na ppo and VG VTh - Assume ns 0 for VG lt VTh
- Assume xdepl xd,max for VG VTh and it doesnt
increase for VG gt VTh - Cd,min eSi/xd,max for VG gt VTh
- Assume ns gt 0 for VG gt VTh
15MOS Bands at OSIp-substr n-channel
Fig 10.9
16Equivalent circuitabove OSI
- Depl depth given by the maximum depl xd,max
2eSi2fp/(qNa)1/2 - Depl cap, Cd,min eSi/xd,max
- Oxide cap, COx eOx/xOx
- Net C is the series comb
COx
Cd,min
17MOS surface statesp- substr n-channel
18n-substr accumulation (p-channel)
Fig 10.7a
19n-substrate depletion(p-channel)
Fig 10.7b
20n-substrate inversion(p-channel)
Fig 10.7
21Values for gate workfunction, fm
22Values for fmswith metal gate
23Values for fmswith silicon gate
24Typical fms values
25Flat band with oxidecharge (approx. scale)
Al
SiO2
p-Si
lt--Vox--gt-
q(Vox)
Ec,Ox
q(ffp-cox)
Ex
q(fm-cox)
Eg,ox8eV
Ec
EFm
EFi
EFp
q(VFB)
Ev
VFB VG-VB, when Si bands are flat
Ev
26Flat-band parametersfor n-channel (p-subst)
27Flat-band parametersfor p-channel (n-subst)
28Inversion for p-SiVgategtVThgtVFB
Vgategt VFB
EOx,xgt 0
e- e- e- e- e-
Acceptors
Depl Reg
Vsub 0
29Approximation conceptOnset of Strong Inv
- OSI Onset of Strong Inversion occurs when ns
Na ppo and VG VTh - Assume ns 0 for VG lt VTh
- Assume xdepl xd,max for VG VTh and it doesnt
increase for VG gt VTh - Cd,min eSi/xd,max for VG gt VTh
- Assume ns gt 0 for VG gt VTh
30MOS Bands at OSIp-substr n-channel
31Computing the D.R. W and Q at O.S.I.
Ex
Emax
x
32Calculation of thethreshold cond, VT
33Equations forVT calculation
34Fully biased n-MOScapacitor
VG
Channel if VG gt VT
VS
VD
EOx,xgt 0
e- e- e- e- e- e-
n
n
p-substrate
VsubVB
Acceptors
Depl Reg
y
0
L
35MOS energy bands atSi surface for n-channel
Fig 8.10
36Computing the D.R. W and Q at O.S.I.
37Qd,max and xd,max forbiased MOS capacitor
Fig 8.11
xd,max (mm)
38Fully biased n-channel VT calc
39n-channel VT forVC VB 0
Fig 10.20
40References
Semiconductor Physics Devices, by Donald A.
Neamen, Irwin, Chicago, 1997. Device
Electronics for Integrated Circuits, 2nd ed., by
Richard S. Muller and Theodore I. Kamins, John
Wiley and Sons, New York, 1986