Dataflow Modeling of Signal Processing and Communication Systems

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Dataflow Modeling ofSignal Processing and
Communication Systems
Prof. Brian L. Evans Guest Lecture forEE 382V
Embedded System Design and Modeling
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Outline
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• Introduction
• Signal processing system design needs
• Synchronous dataflow
• Signal processing building blocks
• Filters
• Rate changers
• Signal processing examples
• Communication system examples
• Conclusion

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Needs for System-Level Design

• Signal processing algorithms
• Multirate processing e.g. interpolation
• Local feedback e.g. IIR filters
• Iteration e.g. decoding
• Graphical representations
• Block diagram syntax natural but static
• Dataflow semantics for signal processing
• Signal representations
• Bit, byte, integer, fixed-point, floating-point
• Complex-valued versions of above
• Vectors/matrices of scalar data types

Often iterative
Do not needrecursion
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Needs for Embedded Realization

• Block-based and point-by-point processing
• Retarget simulation for embedded platforms
• Processors (e.g. DSPs) and hardware (e.g. FPGAs)
• Cosimulation on desktop and embedded platforms
• Static scheduling
• Prediction of resources (e.g. memory) at compile
  time
• DSPs have limited on-chip memory (32-512 kB)
• FPGAs have limited on-board memory logic blocks
• Floating-point to fixed-point conversion

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Dataflow Models

• Match data-intensive processing
• Signal processing
• Communication systems
• Definitions Lee
• A token is a data value or data structure
• A signal is a sequence of tokens
• A node maps input tokens onto output tokens
• Set of firing rules specify when a node can fire
• A firing of a node consumes input tokens and
  produces output tokens
• A sequence of firings is a dataflow process

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Synchronous Dataflow Lee 1987

• Untimed
• Arcs one-way first-in first-out (FIFO) queues
• Nodes functional blocks
• Source nodes always enabled
• Others enabled when enoughsamples are on all
  inputs
• Node execution
• Consumes same fixed number of samples on each
  input arc
• Produces same fixed number of tokens on each
  output arc
• Consumed data is dequeued from arc
• Flow of data through graph does not depend on
  data values

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Synchronous Dataflow (SDF)

• Delay of (n) samples
• n samples initially in FIFO queue
• Systems are determinate
• Execution in sequence or parallelhas same
  outcome (predictable)
• Systems can be statically analyzed
• Check for sampling rate consistency
• Determine/optimize FIFO queue sizes atcompile
  time
• Models systems with rational rate changes

Periodic schedule fires A twice B thrice, e.g.
AABBB or ABABB
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2
A
B
3
(6)
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Nodes are not multirate but graph is!
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Dataflow Models in Design Tools
Design Tool Dataflow Model(s) Example Applications
Agilent Advanced Design System Synchronous and Timed Synchronous Dataflow Mixed analog, digital, and RF communication systems
Coware Signal Proc. Worksystem Synchronous and Dynamic Dataflow Periodic digital systems, e.g. transceivers MP3 decoders
National Instruments LabVIEW Homogeneous Dynamic Dataflow (G) Periodic and aperiodic digital systems
Synopsys CoCentric System Design Studio Cyclostatic Dataflow Periodic digital systems, e.g. transceivers mp3 decoders
UC Berkeley Ptolemy Classic Synchronous and Dynamic Dataflow Periodic and aperiodic digital systems
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Outline
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• Introduction
• Signal processing system design needs
• Synchronous dataflow
• Signal processing building blocks
• Filters
• Rate changers
• Signal processing examples
• Communication system examples
• Conclusion

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Homogeneous Operations

• Pointwise arithmetic operations (addition, etc.)
• Delay by m samples
  property of SDF arc
• Finite impulseresponse filter

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1
1
1


1
S
FIR
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Homogeneous Operations
xk
yk

• Infiniteimpulseresponsefilter

?
UnitDelay
UnitDelay
xk-1
yk-1
UnitDelay
UnitDelay
xk-2
yk-2
Feed-forward
Feedback
UnitDelay
UnitDelay
IIR
yk-M
xk-N
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Increasing Sampling Rate

• Upsampling by L denoted as L
• Outputs input sample followed by L-1 zeros
• Increases sampling rate by factor of L
• Finite impulse response (FIR) filter gm
• Fills in zero values generated by upsampler
• Multiplies by zero most of time(L-1 out of every
  L times)
• Sometimes combined intorate changing FIR block

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Polyphase Filter Bank Form

• Filter bank (right) avoids multiplication by zero
• Split filter gm into L shorter polyphase
  filters operating at lower rate (no loss in
  output precision)
• Saves factor of L in multiplications and prev.
  inputs stored and increases parallelism by factor
  of L

Oversampling filter a.k.a. Pulse shaper a.k.a.
Linear interpolator
g0n
s(Ln)
1
L
g1n
L
1
s(Ln1)
gm
L
Multiplies by zero (L-1)/L of the time
gL-1n
s(Ln(L-1))
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Decreasing Sampling Rate

• Finite impulse response (FIR) filter gm
• Typically a lowpass filter
• Enforces sampling theorem
• Downsampling by L denoted as L
• Inputs L samples
• Outputs first sample and discards L-1 samples
• Decreases sampling rate by factor of L
• Sometimes combined intorate changing FIR block

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1
1
1
gm
4
4
1
FIR
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Polyphase Filter Bank Form

• Filter bank (right) only computes values output
• Split filter hm into M shorter polyphase
  filters operating at lower rate (no loss in
  output precision)
• Saves factor of M in multiplications and
  increases parallelism by factor of L

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s(Mn)
Undersampling filter a.k.a. Matched filter
sampling a.k.a.Linear decimator
h0n
s(Mn1)
h1n
1
M
M
hm
M
hM-1n
Outputs discarded (M-1)/M of the time
s(Mn(M-1))
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Outline
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• Introduction
• Signal processing system design needs
• Synchronous dataflow
• Signal processing building blocks
• Filters
• Rate changers
• Signal processing examples
• Communication system examples
• Conclusion

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Spectral Shaping for Converter

• Upsampling by 4
• Output input sample then 3 zeros
• Increases sampling rate fourfold
• FIR filter performs interpolation

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Noise-Shaped Feedback Coding

• Homogeneous. Computable?

difference
quantizer
u(m)
b(m)

x(m)
_
_
e(m)

compute error (noise)
shapeerror (noise)
Sigma-delta modulator using noise-shaped feedback
coding (spectral shaping)
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Outline
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• Introduction
• Signal processing system design needs
• Synchronous dataflow
• Signal processing building blocks
• Filters
• Rate changers
• Signal processing examples
• Communication system examples
• Conclusion

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Communication Systems

• Message signal mk is information to be sent
• Information may be voice, music, images, video,
  data
• Low frequency (baseband) signal centered at DC
• Transmitter signal processing includes lowpass
  filtering to enforce transmission band
• Transmitter carrier circuits upconvert signal

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Communication Systems

• Propagating signals experienceattenuation
  spreading w/ distance
• Receiver carrier circuits downconvert to an
  intermediate frequency and possibly baseband
• Receiver signal processing extracts/enhances
  baseband signal

Model the environment
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Quadrature Amplitude Modulation
in
gTm
L
Index
Bits
Pulse shaper(FIR filter)
cos(?0 m)
Serial/parallelconverter
Map to 2-D constellation

J
1
Digital QAM Transmission
gTm
L
qn
L samples per symbol (upsampling)
sin(?0 m)
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Quad. Amplitude Demodulation
Digital QAM Reception
iestn
hoptm
L
Matched filter(FIR filter)
cos(?0 m)
Parallel/serialconverter
DecisionDevice
heqm
1
J
Bits
Symbol
Channel equalizer (FIR filter)
hoptm
L
qestn
L samples per symbol (downsampling)
sin(?0 m)
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Modeling of Points In-Between

• Baseband channel model
• Combines transmitter carrier circuits, channel
  and receiver carrier circuits
• One model uses cascadeof gain, FIR filter,
  andadditive noise(homogeneous SDF)

FIR

noise
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Limitations of SDF

• Strengths of SDF are also its limitations
• Untimed
• Predictable flow of data through graph
• Modeling of receiver front end
• Automatic gain control (AGC)
• Symbol clock recovery (digital IIR)
• Receive filter (analog IIR)

CarrierDetect
AGC
Analog front end for QAM reception
Receive Filter
A/D
Symbol Clock Recovery
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Conclusion

• Synchronous dataflow model does not support
• Composability with itself
• Data-dependent graphs
• Recursion
• Advantages
• Models multirate systems
• Ability to generate static schedules at compile
  time (resources required by graph known in
  advance)
• Static sequential schedules can be optimized for
  minimum program memory or buffer memory
• SDF modeling allows efficient simulation and
  synthesis
• SDF well-matched to signal processing and
  communications

Limited expressiveness enables SDF to be
statically scheduled
Synchronous dataflow is untimed and determinate
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• Thank You,
• Questions ?