ECAL electronics

1
ECAL electronics

• System test in Pisa
• ECRATE
• High Voltage power supply (brick)

2
ECAL electronics
?
Electr Mech LAPP-Annecy EletrMech
INFN-Pisa Electronics CAEN - Italy Mechanics
Italy Canarie TestsValidation INFN-Pisa SQ
Tests INFN-Pisa CIEMAT-Madrid In common with
RICH subdet. Electronics CSIST -
Taiwan Mechanics Canarie islands TestsValidation
INFN-Pisa CIEMAT-Madrid
?
REST OF THE WORLD
?
?
?
DATA LV
ECAL CRATE
?
ON ECAL
SLOW CONTROL
TRIGGER
LV
?
?
HV
ANALOG TRIGGER
LV
LINEAR REGULATOR
Front End
High Voltage
Low Voltage
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System tests in PISA

• In the week 23-27 may a system to test the
  complete chain has been setup in Pisa, with the
  help of G.Cougoulat, J.Tabin 2 technicians from
  LAPP

The ECAL full scale prototype, built in Pisa in
2001, has been equipped with 9 PMTs and a LED
system
PMT insertion
Coverage for light tightness
ECAL full scale prototype
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System tests in PISA

• A row of 9 PMTs has been mounted, equipped with
  ECAL Front end Electronics (EFE) and with ECAL
  Intermediate Board (EIB)

• The EHV brick has been used to power PMTs

EFE connector
EIB readout
HV cables
5

• A LED system was prepared (two rows equipped)
• Each LED could be individually switched on at the
  desired intensity

PMTs on opposite face
LED system 18x2 LEDs connected in pairs
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System tests

• Low Voltage was provided by the S9057E QM board
  built in Taiwan at CSIST
• EPSFE was used as Solid State Fuse (no slow
  control, yet)
• Data were readout through EDR, JINF and then,
  using EPPCAN box, collected on PC and analyzed
  offline
• One EDR reads 3 EIBs, therefore each event
  consisted in
• 3 (EIB) x 9 (PMTs/EIB) x 9 (channels/PMT) 243
  words
• The software written by Kounine and adapted to
  ECAL readout by S.DiFalco was used

Back Plane
Back Plane
E P S F E
E D R
J I N F
9 0 5 7 E
data
data
LV
LV
EIB
EPPCAN PC
ECAL prototype
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• Output plots for the 9 channels of PMT 1 for a
  given LED pulse height

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Why 9 channels per PMT ?

• Dynode
• 1 channel
• gain 5?104
• used for trigger
• Low Gain Anodes
• 4 channels
• gain 105
• Energy range 30MeV-90GeV
• High Gain Anodes
• 4 channels
• gain 3?106
• Energy range 1MeV-3GeV

Optical fibers (140 per PMT)
1.8cm
PMT
charge collection system
To front end electronics
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Linearity plots
Low gain High gain Ratio High/Low
30 29
30 29
29 28
ADC counts
LED pulse height (A.U.)
Saturation of High Gain ch.
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• STATUS OF BOARDS

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EDR

• 6 QM PCBs produced in Italy at ZINCO CELERE (ESA
  qualified factory)
• PCB currently at FAGREL (Milano) to be mounted
  under supervision of A.DellAcqua (CGSpace)
• board to Pisa for electrical tests ? beginning
  of Sep
• board to CGSpace for coating ? october

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ETRG

• FPGA with trigger logic programmed and partially
  tested more tests in program with simulator
  board
• FPGA with Common Digital Part programmed jul, 19
  by F.Spinella and E.Pedreschi under the
  supervision of V.K.
• Ready to order PCBs for QM2 (september)

Trigger Simulator Board
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EBP

• all connections tested
• two modifications to the design must be made in
  order to accommodate it in the ECRATE
• angles must be rounded
• power taps on the backplane are too close to the
  stiffners
• PCB design is being reviewed to insert these
  modifications
• Ready to order QM in september

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EPSFE
Provides low voltage to 3 EIB boards Slow
control functionality 1 channel (positive and
negative) tested at CERN QM ready within Nov, 15
I/O
3.5V
-2.7V
COLD
HOT
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Mechanics

• QM crate produced -gt needs alodine treatment and
  painting will be done in September
• Panel connecting crate to LUSS still to be done
• Crate ready in October
• Front panels for QM EDR produced 2 of them
  already sent to factory for QM production
• All QM front panels ready before end of September

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Summary on ECRATE

• EDR tested ? QM production (6 units) started
• EBP tested ? due to interference with mechanics,
  PCB must be modified ? QM (1 unit) produced in
  September
• ETRG partially tested CDP code written ? more
  tests in september ? QM (1 unit) produced in
  October
• EPSFE EM tested small modifications to design
  CDP code written ? more tests in progress
• Mechanics all parts of QM crate ready ? missing
  fasteners and surface treatment
• SQ tests will be performed in Terni in November

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• 2 - HIGH VOLTAGE

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From last TIM (april 2005)

• Current schedule
• Mount the brick in may at CAEN (in Viareggio,
  30km from Pisa)
• Prepare the brick SQ tests in Madrid (build
  interface for ThermoVacuum chamber, build stands
  for Vibration Tests, )
• Perform SQ tests within june
• If SQ tests are succesfull, EHV production will
  start immediately afterward

• but

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Situation in may

• The test responsability is shared between INFN
  Pisa (ECAL) and CIEMAT Madrid (RICH), since the
  bricks are nearly identical
• INFN Pisa resp. for brick crate and control
  software
• CIEMAT Madrid resp. of tests setup (electrical
  mechanical interfaces )
• The mechanics arrived in Pisa beginning of may
  from Milano and from Madrid
• Tests were planned in Madrid starting from june
  20

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• The brick underwent thermal cycles in Pisa
• plus vibration tests (car trip from Pisa to
  CERN and back)
• we (Federico Pilo MI) noticed malfunctioning
  first in 1 and then in 2 channels

BRICK
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At CAEN to understand

• The brick was carried to CAEN and carefully
  tested
• The result is that in some linear regulators the
  SOLDERING WAS BROKEN due to different
  thermal/mechanical properties of resin and
  soldering paste

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• The result is that the ECAL EHV cannot be used as
  a QM anymore
• A new strategy to fix linear regulators to the
  main board must be used by CAEN
• The proposal is to bend the linear regulators
  pins in order to use them as strain relief

Previous picture showing this detail
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RHV brick

• CAEN is building now the RICH QM
• The modification to the linear regulators pin has
  been implemented
• The mechanics built for ECAL QM will be used for
  the RICH QM
• The new brick will be finished first week of
  August and sent to Madrid (pictures in next
  slide)
• People electronics necessary to drive the RHV
  brick will be sent to Madrid beginning of
  September (Sep, 5)
• SQ tests will be performed in the month of Sep
  and, if no problems show up, the flight models
  will be ordered (8 months for delivery)

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Status of RHV assembly

• Mechanics with holes for temperature sensors

• Front panel HV connectors
• LV and data not connected yet

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Status of RHV assembly

• Distributor boxes distribute the HV provided by
  elevator to linear regulators
• Only one elevator for RICH hole filled with
  dummy box

• HV controller board
• Front panel with 2 LV and 2 Slow Control
  connectors