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Verilog Transcendental Functions

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Verilog Transcendental Functions. for Numerical Testbenches. Mark G. Arnold ... How to test such designs in Verilog? Need testbench aware of math functions ... – PowerPoint PPT presentation

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Title: Verilog Transcendental Functions


1
Verilog Transcendental Functions for Numerical
Testbenches
Mark G. Arnold University of Manchester
Institute of Science Technology, UK Colin
Walter University of Manchester
Institute of Science Technology, UK Freddy
Engineer Xilinx, Inc., San Jose, CA
2
Numeric-intensive embedded hardware systems use
transcendental functions FFT
sin(x),cos(x) Neural Nets 1/(1exp(-x))
Graphics sqrt(xxyyzz), trig How to
test such designs in Verilog? Need testbench
aware of math functions Problem 1993 Verilog
lacks these functions Problem Access to C
functions needs PLI Problem Synthesizable
Verilog uses reg Numeric algorithm uses real
3
Ways to use reg as real
Fixed-point (FX) cheap but hard to design
Floating point (FP) easier but more expensive
Logarithmic number system (LNS) cheaper than
FX, easy as FP, but weird see www.xlnsresearch.co
m for more
4
We need log(x) and exp(x) for LNS, so why not
design something more general a
transcendental package for Verilog? Useful for
testbenches that verifies hardware involving
transcendental functions. Available
www.cs.uwyo.edu/marnold/verilogmath.html module
math include math.v endmodule
5
Black-Box Testbench

Testbench Verilog does not know
about sin(x),log(x) Only can compare
against expected overall behaviour
Embedded Hardware sin(x) log(x) etc
other hard- ware )
6
White-Box Testbench
Testbench Verilog sin(x) Verilog log(x) Can
test individual function units
Embedded Hardware sin(x) log(x) etc
other hard- ware
7
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8
sin(x)
Syntax math.sin(x) Computed by c1xc3 x3c5
x5c7 x7 in the range -?/2 lt x lt
?/2 Range reduction xlt0, sin(x)
-sin(-x) xgt?/2, sin(x) -sin(x-?) Errors n
one
9
cos(x)
Syntax math.cos(x) Computed by sin(x ?/2)
Range reduction like sin(x) Errors none
10
tan(x)
Syntax math.tan(x) Computed by sin(x)/cos(x)
Errors x ?/2
11
tan-1(x)
Syntax math.atan(x) Computed by b0a1 /
(x2b1-a2 / (x2b2 a3/(x2b3)))
in the range 0 lt x lt 1 Range reduction x lt 0,
tan-1(x) tan-1(-x) x gt 1,
tan-1(x) ?/2 - tan-1(1/x) Errors none
12
cos-1(x)
Syntax math.acos(x)
_____ Computed by tan-1( ?1.0-x2 / x )
in the range 0 lt x lt 1 Errors xlt0, xgt1
13
sin-1(x)
Syntax math.asin(x)
______ Computed by tan-1( x / ?1.0 - x2
) in the range 0 lt x lt 1 Errors x
lt 0, x gt 1
14
ex
Syntax math.exp(x) Computed by 2x ln(2)
Range reduction e-x 1/ex Errors
xgt177
15
xy
Syntax math.pow(x,y) Computed by e y ln(x)
in the range xgt0 Errors xlt0, y
ln(x)gt177
16
__ ?x
Syntax math.sqrt(x) Computed by eln(x) / 2
in the range x gt 0 Errors x lt 0
17
ln(x)
Syntax math.log(x) Computed by log2(x) /
log2(e) in the range x gt 0 Errors x lt
0
18
2x
Syntax N/A Computed by products of
rootof2(i) Errors x gt 255
19
For k bits of precision, rootof2(-k) starts with
2k root of two Our function uses k 23 bits of
precision, rootof2(-23) 8388608?2
1.000000082629586 Simpler example k 2,
rootof2(-2) 4?2 1.1892 When ith bit
of x is one, multiply product by corresponding
rootof2(i)
20
rootof2(i) squares on each iteration
i-2, ( 4?2 )1 1.1892 Example
x 5.75 101. 112, 2x ?
1.1892
21
rootof2(i) squares on each iteration
i-2, ( 4?2 )1 1.1892 i-1, ( 4?2 )2
1.18922 1.4142 Example x
5.75 101. 112, 2x ?
1.41421.1892
22
rootof2(i) squares on each iteration
i-2, ( 4?2 )1 1.1892 i-1, ( 4?2 )2
1.18922 1.4142 i 0, ( 4?2 )4
1.41422 2.0 Example x 5.75
101. 112, 2x ? 2.01.41421.1892

23
rootof2(i) squares on each iteration
i-2, ( 4?2 )1 1.1892 i-1, ( 4?2 )2
1.18922 1.4142 i 0, ( 4?2 )4
1.41422 2.0 i1, ( 4?2 )8 2.02
4.0 Example x 5.75 101.
112, 2x ? 2.01.41421.1892
24
rootof2(i) squares on each iteration
i-2, ( 4?2 )1 1.1892 i-1, ( 4?2 )2
1.18922 1.4142 i 0, ( 4?2 )4
1.41422 2.0 i1, ( 4?2 )8 2.02
4.0 i2, ( 4?2 )16 4.02 16.0 Example
x 5.75 101. 112, 2x ?
16.02.01.41421.1892 53.8165
25
Code that computes 2x1
prod 1.0 power 128.0 for (i 7 i gt -23
i i-1) begin if (x1 gt power) begin
prod prod rootof2(i) x1 x1 - power
end power power / 2.0 end
26
log2(x)
Syntax N/A Computed by iteration involving
rootof2(i) Errors x lt 0
27
Example x 53.8165
? 53.8165 gt 16.0?

log2(x) ????. ??2
28
Example x 53.8165
? 53.8165 gt 16.0? yes,
53.8165/16.0 3.3635 ? 3.3635 gt 4.0?

log2(x) ?1??. ??2
29
Example x 53.8165
? 53.8165 gt 16.0? yes,
53.8165/16.0 3.3635 ? 3.3635 gt 4.0?
no ? 3.3635 gt 2.0?

log2(x) ?10?. ??2
30
Example x 53.8165
? 53.8165 gt 16.0? yes,
53.8165/16.0 3.3635 ? 3.3635 gt 4.0?
no ? 3.3635 gt 2.0? yes,
3.3635/2.0 1.68175 ?1.68175 gt 1.4142?
log2(x)
?101. ??2
31
Example x 53.8165
? 53.8165 gt 16.0? yes,
53.8165/16.0 3.3635 ? 3.3635 gt 4.0?
no ? 3.3635 gt 2.0? yes,
3.3635/2.0 1.68175 ?1.68175 gt 1.4142?
yes, 1.68175/1.4142 1.1892 ?
1.1892 gt 1.1892?
log2(x) ?101. 1?2
32
Example x 53.8165
? 53.8165 gt 16.0? yes,
53.8165/16.0 3.3635 ? 3.3635 gt 4.0?
no ? 3.3635 gt 2.0? yes,
3.3635/2.0 1.68176 ?1.68176 gt 1.4142?
yes, 1.68176/1.4142 1.1892 ?
1.1892 gt 1.1892? yes,
log2(x) ?101. 112 5.75
33
Code that computes log2(re)
log2 0.0 for (i7 igt-23 ii-1) begin if
(re gt rootof2(i)) begin re
re/rootof2(i) log2 2.0log2 1.0 end
else log2 log22 end
34
Conclusions
We provide 23-bit functions for testbench use We
have trig functions useful for FFT and
graphics We have exp, log, pow and sqrt
functions useful for LNS and neural nets Our
functions are compact and portable dont need
PLI encourage white-box testing
35
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36
IEEE 754 standard for Floating Point (FP)
Mantissa reg with significant bits Exponent
reg that determines scaling Each has a separate
datapath Simulator supports real type real
p,t,a,b OK tab OK pab
Synthesis does not support real
WRONG pab WRONG tab
37
Have to design by hand Both and are
expensive Most embedded systems avoid FP
Debugging display(bitstoreal(a))
38
Fixed point (FX) reg scaled by a fixed power of
two
Simulator supports FX only partially
OK tab WRONG pab Synthesis is
same Have to design by hand Rounding
for Scaling for is same as
integer cheap Scaling difficult FX delays
time to market But, FX less expensive than FP
Most embedded systems use FX
39
Debugging
display(SCALE a) SCALE constant designer
determines
40
? LNS reg has fixed-point logarithm ? Neither
synthesis nor simulation supports ? Multiply
is as cheap as ? Automatic scaling like FP ?
Lower Cost, Power than FX ? LNS is seldom used
? Debugging 1993 Verilog lacks log/exp
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44
This is a copy of the lines in place they
mark where the lines were on the master slide
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