AnalogtoDigital Converter

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Analog-to-Digital Converter
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What is Analog-to-digital Conversion?

• It is a procedure that samples an analog signal
  at a sequence of time instances and convert the
  sample values into digital representations.
• Several different techniques exists for A/D
• Flash high-speed, low resolution
• StaircaseHigh-resolution, low speed
• Successive approximation general purpose
• Delta-sigma highest resolution, highest speed

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Comparator
V-
-
V0
V
V0
Vmax
A 106 -Vmax lt V0 ltVmax Vmax 12 to 15V
-Vmax
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Example Light Detector
15V
Cadmium Sulfide Cell
1M? 100?
-
V
Low light
V0
High light
1k?
1V
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Flash
Vref
-
V01
R
VT1
Encoder
Vin
Binary words
-
V02
R
(Analog)
VT2
-
V03
R
VT3
-Vref
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Flash Continued
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Pros. Cons. Of Flash

• High speed suitable for fast changing signal.
• No Sample/Hold circuit needed.
• One comparator is needed for each possible output
  step change
• Only practical for 46 bits range.

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Staircase Converter
Digital Output
Clock
Vin (Analog)
Latch
Up counter
And
-
DAC
v
t
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And Gate
The output is high if both A and B are high
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Clock
High
Low
time
Duty cycle tH/tp
Clock Frequency 1/tp
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Counter
Counter
Input
Output
Input clock signal
0001 0010 0011
A 4-bit counter output
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Latch
A sequential device that watches its inputs
continuously and changes its output according to
some set logic.
Output
D Q C QN
Data line
Control line
Output
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An example signal sequence
Assuming (1) a 4-bit DAC with step size 0.6V, (2)
a 4-bit counter, (3) Vin3V
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Pros Cons of Staircase Converter

• High resolution
• Very low speed, especially for large bit numbers.

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Successive Approximation
Clock
Analog input Vin
Digital output Vout
Successive approximation logic
-
Latch
DAC
Vdac
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A Simple Example
Assume a 3-bit system, DAC swing voltages from 0
to 5V
DAC step size ??5/70.71V
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Example Scenario 1 Vin0.5V (lt?)
Step 1 Determine the most significant bit (MSB)
bit 2 Set bit 2 1
Bit 2 1 0
Since Vin lt VDAC,
Bit 2 0
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Example Scenario 1 Vin0.5V (lt?)
Step 2 Determine the next most significant bit
bit 1 Set bit 1 1
Bit 2 1 0
Since Vin lt VDAC,
Bit 1 0
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Example Scenario 1 Vin0.5V (lt?)
Step 3 Determine the next most significant bit
bit 0 Set bit 0 1
Bit 2 1 0
VDAC ? 0.71V
Since Vin lt VDAC,
Bit 0 0
VDAC 0V
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Example Scenario 2 Vin1V (lt2?)
Step 1 Determine the most significant bit (MSB)
bit 2 Set bit 2 1
Bit 2 1 0
Since Vin lt VDAC,
Bit 2 0
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Example Scenario 1 Vin1V (lt2?)
Step 2 Determine the next most significant bit
bit 1 Set bit 1 1
Bit 2 1 0
Since Vin lt VDAC,
Bit 1 0
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Example Scenario 1 Vin1V (lt2?)
Step 3 Determine the next most significant bit
bit 0 Set bit 0 1
Bit 2 1 0
VDAC ? 0.71V
Since Vin gtVDAC,
Bit 0 1
VDAC 0.71V
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Example Scenario 3 Vin4.5V
Step 1 Determine the most significant bit (MSB)
bit 2 Set bit 2 1
Bit 2 1 0
Since Vin gt VDAC,
Bit 2 1
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Example Scenario 1 Vin4.5V
Step 2 Determine the next most significant bit
bit 1 Set bit 1 1
Bit 2 1 0
Since Vin gt VDAC,
Bit 1 1
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Example Scenario 1 Vin4.5V
Step 3 Determine bit 0 Set bit 0 1
Bit 2 1 0
VDAC 7? 4.99V
Since Vin ltVDAC,
Bit 0 0
VDAC 4.26V
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Successive Approximation

• Step1 The successive approximation logic feeds
  the DAC with a digital word whose MSB is 1 and
  all remaining bits are 0.
• Step2 The comparator compares this DAC output
  with the analog input signal.
• If VingtVdac, comparator output high, successive
  approximation logic set MSB1
• If VinltVdac, comparator output low, successive
  approximation logic set MSB0
• Step3 The successive approximation logic feeds
  the DAC with a digital word whose MSB is
  determined by the above steps, the 2nd MSB to 1,
  and all remaining bits are 0. Repeat Step2 and
  determine the 2nd MSB.
• Repeat this procedure for every bit.

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Pros Cons of Successive Approximation

• High speed than staircase
• Reasonable resolution
• Good general purpose 16-bit area ADC

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Integrated Circuit ADC

• We worked with National Semiconductors ADC0831
  in Lab 6
• Data sheet available at http//www.national.com

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Example

• To digitize human voice signal, the maximum input
  frequency is to be limited to 30kHz and
  resolution to be better than 0.5 of the maximum
  input value is required.
• Determine the minimum bit requirement
• Determine the minimum sampling rate if the
  Nyquist rate is set to 25 greater than the
  theoretical minimum.
• Determine the anti-alias filter cutoff frequency
• What is your preferred conversion technique? Give
  reasons.

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Another example

• A 16-bit DAC with 1?s conversion time is used to
  construct an ADC.
• If the DAC is used to construct the staircase
  ADC, what is the maximum sampling rate of the
  ADC? What is the highest frequency that can be
  processed by this ADC without distortion? What is
  the resolution of the ADC if the peak value of
  the analog signal is 1V?
• If the ADC is used to construct a successive
  approximation ADC, what is the maximum sampling
  rate of the ADC? What is the highest frequency
  that can be processed by this ADC without
  distortion? What is the resolution of the ADC if
  the peak value of the analog signal is 1V?

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Reading and Homework

• Todays coverage handouts 4
• Next Lecture handouts 5
• Homework 10. Due Wed. 3/2
• Given a 14-bit ADC, determine the number of
  comparators required for the flash technique,and
  the number of comparisons required if successive
  approximation technique is used.
• A single 16-bit ADC with sampling rate of 10 kHz
  is connected to a PC. Determine the data rate in
  bytes per second. If the PC has 350 k bytes of
  RAM available for data storage, how much time
  does this represent?
• A 12-bit 2 ?s DAC is used as part of a discrete
  successive approximation ADC. Assuming that
  logic delays and signal settling times are
  negligible, determine the minimum time allowable
  between sample points, and the maximum input
  signal frequency without aliasing.
• An 8-bit ADC produces a full scale output of
  11111111 with a 2V input signal. Determine the
  output word given the following inputs 100 mV,
  10?V, 0V, 1.259V (Assume that this converter
  rounds to the nearest output value and is
  unipolar).
• Determine the maximum conversion time for an
  8-bit ADC using flash, successive approximation,
  and staircase techniques respectively.