Radar Processing with COTS Components

1
Radar Processing with COTS Components
Jack M. West, Brian F. Veale, Jeffrey T.
Muehring, and John K. AntonioTexas Tech
UniversityDARPA Contract No. F30602-97-2-0297
SAR Processing Flow
STAP Flow
PCI
Data Transfer
Range
Data Transfer
Range
Doppler
Azimuth Sectioned Convolutions
Azimuth
FFT Size
Channel
Data Transfer
Overlap
Kernel Size
Section
Research Topics

• Probabilistic Power Prediction Simulator for
  Xilinx 4000-series Parts
• RACE Network Simulator
• CN Configuration for SAR Processing
• Series/Parallel FIR Design for FPGA- based
  Range Compression
• Selection of FPGA Word Sizes and Formats
• Mapping and Scheduling of STAP Data
  Communications
• Weight Calculation Algorithm Selection and
  Integration with FPGA- based Inner Product
  Co-Processor
• Minimal Power Configuration of FPGA/DSP/GPP
  System for STAP and SAR Processing

Physical View of Prototype System