CALICE STATUS

1
CALICE STATUS
Mark Thomson University of Cambridge
For the CALICE-UK groups Birmingham, Cambridge,
Imperial, Manchester, RAL, UCL

• Overview
• UK Hardware
• UK Simulation
• UK Reconstruction
• Conclusions

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Calorimetry at a Future LC

• Much LC physics depends on reconstructing
• invariant masses from jets in hadronic final
  states
• Kinematic fits dont help Beamstrahlung, ISR
• Jet energy resolution is of vital importance

The energy in a jet is
The Energy Flow/Particle Flow Method

• Reconstruct momenta of individual particles
  avoiding double counting

• need to separate energy deposits from different
  particles

3
Calorimeter Requirements
ECAL
4
Calorimeter Concept

• ECAL and HCAL inside coil
• Better performance
• but impacts cost

• ECAL silicon-tungsten (SiW) calorimeter
• Tungsten X0 /lhad 1/25, RMoliere 9mm
• (gaps between Tungsten increase effective
  RMoliere)
• Lateral segmentation 1cm2 matched to
  RMoliere
• Longitudinal segmentation 40 layers (24 X0,
  0.9lhad)

• HCAL digital vs. analogue (major open question)
• Tile HCAL (Analogue readout)
• Steel/Scintillator sandwich
• Lower lateral segmentation 5x5 cm2
  (motivated by cost)
• Digital HCAL
• High lateral segmentation 1x1 cm2 but
  digital readout
• RPCs, GEMS

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CALICE Collaboration
6
UK Contribution

• Readout and DAQ for test beam prototype
• Provide readout electronics for the ECAL
• (Possibly use UK boards for some HCAL
  options)
• DAQ for entire system
• Simulation studies
• ECAL cost/performance optimisation
• Impact of hadronic/electromagnetic
  interaction
• modelling on design.
• Comparisons of Geant4/Geant3/Fluka
• Reconstruction/Energy Flow
• Started work towards ECAL/HCAL reconstruction
• Ultimate goal UK Energy flow algorithm
• Luminosity spectrum from Bhabha acolinearity
  (UCL)

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Test Beam and Prototype

• Combined ECAL HCAL
• Engineering Run late 2004
• in e- beam at DESY
• (ECAL only)
• Physics Run in 2005
• p/p beam at FNAL (TBC)
• HCAL 38 layers Fe
• Insert combinations of
• digital pads
• (350k, 1x1cm2 pads)
• GEM
• RPC
• analogue tiles
• (8k, 5x5cm2)
• Scintillator tiles

Moveable table
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Prototype ECAL

• 3x10 layers, Si-W
• 0.4X0, 0.8X0, 1.2X0
• Each layer 3x3 wafers
• Each wafer 6x6 pads
• 9720 channels total

Carbon Fibre/ Tungsten
Si/W/Si Sandwich
External Readout (VFE)
Wafers
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Readout Overview

• CALICE ECAL has 9720 channels
• Each gives analogue signal, 14-bit dynamic range
• Very-front-end (VFE) ASIC (Orsay) multiplexes 18
  channels to one output line
• VFE-PCB handles up to 12 VFEs (216 channels)
• Cables from VFE-PCBs go directly to UK VME
  readout boards, called Calice ECAL Readout Cards
  (CERCs)
• Based heavily on CMS tracker readout

• Rutherford Laboratory
• Adam Baird, Rob Halsall, Ed Freeman
• Imperial College London
• Osman Zorba, Paul Dauncey
• University College London
• Matt Warren, Martin Postranecky
• Manchester University
• Dave Mercer

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CERC status

• Prototype design completed last summer
• Two prototype boards fabricated last year
• Arrived on November 21 at Rutherford Laboratory

• Currently under stand-alone tests in the UK
• Aim to test with a VFE-PCB in the UK very soon
• Move UK hardware to Paris (Ecole Polytechnique)
  for cosmic tests with fully populated VFE-PCB
  with Si wafers in Feburary

Front End FPGAs
Back End FPGA
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Outstanding Issues

• Final path for data has several complex steps
• FE digitises ADC data for each trigger
• Automatically transferred to 8MByte memory
• Memory read from VME when bandwidth available
• Needs data transfer, memory control and VME
  interface
• BE FPGA firmware not yet functional
• Memory components delayed in delivery not yet
  mounted on CERCs
• Aiming for end of March for all this to be
  working !
• Backup for VFE tests
• Implement simple RS232 interface from PC to BE
  and hence to FEs
• RS232 reads FIFO one word at a time directly to
  PC
• 8MByte memories bypassed, must read each event
  before next trigger
• Rate is slow 1Hz for events sufficient for
  cosmics

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Schedule

• VFE tests in Paris in February
• Essential test of prototypes before moving to
  production
• Possible AHCAL test in April
• Need more information on what is required number
  of channels, interface specification for VFE-PCB
  equivalent,
• Finalise redesign by end March
• Re-layout/fabricate 9 production CERCs in
  April-May
• Simple fixes for the few known problems may be
  possible
• If so, maybe no need to re-layout save a month
• Only have components for nine boards need to
  know early if more wanted for HCAL
• Will need non-UK funds for HCAL readout
• Full ECAL system tests from July onwards
• On schedule for DESY ECAL test beam in Oct/Nov

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Test Beam Requirements

• What Data ? Proton/pion/muon ?
• How much data ?

5 GeV p

• Use MC studies to study what data would be most
  useful in validating MC models (David Ward)
• e.g. Compare samples of
• 5 GeV p in Geant3 (histo) and Geant4 (points)
• Significant differences seen at the level of 104
  events
• HCAL shows greatest discrepancies

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Differences depend on Energy
1 GeV p
50 GeV p

• Therefore scan over energies

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Protons vs Pions
5 GeV p
5 GeV p

• Need to understand beam ! i.e. pion/proton ratio

• Find protons/neutrons v. similar (at least in MC)

• Greater differences for Scintillator HCAL vs. RPC

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Test Beam Conclusions

• 1 precision suggests gt104 events per particle
  type and energy.
• Would like energies from 1-80 GeV (10-15 energy
  points?).
• Pions and protons desirable (Cerenkov needed).
  Electrons ( muons?) for calibration.
• Need to understand beam
• Both RPC and Scintillator HCAL needed.
• Position scan aim for 106 events/energy point?
• Also some data at 30-45o incidence.

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Study of hadronic models (G Mavromanolakis, N.
Watson)

• Compare (G Mavromanolakis)
• Geant 3 with Gheisha
• Geant 3 / Gheisha (SLAC version)
• Geant 3 / Fluka
• Geant 3 / Fluka / Micap (used for n lt 20 MeV)
• Geant 4 / Mokka

• Also Studying
• Variations of Geant 3/Geant 4
• cutoffs (G Mavromanolakis)
• Geant 4 FLUKA (N.Watson)
• - Geant 3 version deprecated
• - Geant 4 implementation
• extremely interesting
• - tricky to get working, but
• making excellent progress

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Calorimeter Reconstruction

• High granularity calorimeter very different
  from previous detectors

• Tracking calorimeter

• Requires new approach to reconstruction
• Already a lot of good work on powerful energy
  flow algorithms
• Still room for new ideas/ approaches
• Current codes inflexible

UK Effort just starting (Chris Ainsley)

• Important for future analysis and energy flow
• studies/detector optimisation

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ECAL Clustering

• Aim to produce a flexible algorithm, not tied
  to specific geometry/MC program.

• Algorithm needs to cope with tracks and clusters
• Sum hits within cell apply threshold of ? MIP
• Form clusters in layer 1 of ECAL.
• Associate each hit in layer 2 with nearest hit in
  layer 1 within cone of angle a. If none,
  initiate new cluster.
• Track onwards layer by layer through ECAL and
  HCAL, looking back up to 2 layers to find nearest
  neighbour, if any.

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Example Events
15 GeV p-
15 GeV e-
Handles CLUSTERS and TRACKS
(Reconstructed clusters are colour-coded, black
highest energy cluster)
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Some more difficult examples
15 GeV t-
15 GeV h?

• Separates nearby ECAL clusters

• So far things look good, but this is just the
  first stage

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Conclusions

• CALICE ECAL prototype progressing well
• - test beam before end of 2004 !
• Confident that UK Electronics/DAQ will be ready
• Work on Digitization simulation starting
  (D.Bowerman, C.Fry)
• UK contributing significantly to understanding
  FNAL test beam requirements
• On-going studies of hadronic models
• UK reconstruction effort starting
• - important for analysis of test beam data
• - important for optimisation of ECAL
  design
• Next 2 years are going to be very interesting
• UK groups well placed to participate in analysis
  of test beam data

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RPC vs. Scintillator HCAL
Scintillator
RPC
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Neutrons vs Protons
5 GeV p
5 GeV n
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CERC overview

• Eight Front End (FE) FPGAs control all signals to
  front end electronics via front panel input
  connectors
• Back End (BE) FPGA gathers and buffers all event
  data from FE and provides interface to VME
• Trigger logic in BE for timing and backplane
  distribution only active in one board
• Each input is one full or two half-full VFE-PCBs
  need 45 inputs 6 CERCs
• Based on CMS tracker readout (FED)

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Readout Details

• Based on CMS silicon tracker readout (FED)
• Will borrow a lot of firmware from them
• Unfortunately not yet as well-developed as hoped
• Dual 16-bit ADCs and 16-bit DAC
• DAC fed back for internal as well as front end
  calibration
• ADC 500kHz takes 80ms to read and digitise
  event data from VFE-PCB
• No data reduction in readout board
• ECAL event size 3.5 kBytes per board, 20 kBytes
  total per event
• On-board buffer memory 8 MBytes
• No buffering available in ECAL front end receive
  data for every trigger
• Memory allows up to 2k event buffer on readout
  board during beam spill
• VME readout speed 20 MBytes/s several seconds
  readout after spill
• Large amount of unused I/O from BE FPGA to
  backplane
• Will implement trigger logic and control/readout
  interface to VME in BE